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CS1600_1007 参数 Datasheet PDF下载

CS1600_1007图片预览
型号: CS1600_1007
PDF下载: 下载PDF文件 查看货源
内容描述: 低成本的PFC控制器,用于电子镇流器 [LOW-cost PFC Controller for Electronic Ballasts]
分类和应用: 功率因数校正电子控制器
文件页数/大小: 18 页 / 194 K
品牌: CIRRUS [ CIRRUS LOGIC ]
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CS1600
1. PIN DESCRIPTIONS
NC
STBY
IAC
FB
1
2
3
4
8
7
6
5
NC
VDD
GD
GND
Table 1. Pin Descriptions
Pin Name
NC
Pin #
I/O
Description
No Connect
— Connect these pins to V
DD
to prevent any leakage path that could
arise from leaving them unterminated.
Standby
— This is an active-low pin. Shorting this pin to GND disables PFC switch-
ing. The input has a pull-up resistor and should be driven with an open-collector
device. Leave this pin unterminated when not in use.
Rectified Line Voltage Sense
— The IAC pin is used to sense the rectified line volt-
age. This signal, in conjunction with the signal on the FB pin, is used in the Power
Factor Correction (PFC) algorithm
A filter capacitor of up to 2.2 nF may be added between this pin and VDD to provide
noise immunity.
Feedback Voltage Sense
— The FB pin is used to sense the output voltage of the
PFC stage. This signal, in conjunction with the signal on the IAC pin, is used in the
Power Factor Correction (PFC) algorithm.
A filter capacitor of up to 2.2 nF may be added between this pin and VDD to provide
noise immunity.
Ground
— GND is a common reference for all the functional blocks in this device.
Gate Drive
— GD is the output of the device with a source capability of 0.5 A and a
current sink capacity of 1 A.
IC Supply Voltage
— V
DD
is the input used to provide bias to the device. This pin
has an internal shunt to ground. An external bias needs to be applied for steady-
state operation. A low-ESR ceramic decoupling capacitor at this pin is recommended
for reliable operation of this device.
1, 8
-
STBY
2
IN
IAC
3
IN
FB
4
IN
GND
GD
5
6
OUT
VDD
7
IN
2
DS904A7