CL-PS7500FE
System-on-a-Chip for Internet Appliance
The LUTs allow for logical-to-physical translation and gamma correction.The Red, Green, and Blue LUTs
each drive respective DACs and the Ext LUT is normally configured to drive the 4-bit output port.
There are three 8-bit, linear monotonic DACs (Red, Green, and Blue), giving a total of 16 M possible col-
ors. The DACs are designed to operate up to 120 MHz and directly drive doubly-terminated, 75-Ω lines.
14.1.4 Pixel Clock
The CL-PS7500FE is capable of generating a display at any pixel rate up to 120 MHz.The pixel clock can
be selected from one of three sources, then the selected frequency of this clock can be further divided by
a factor between 1 and 8.
The video and sound macrocell contains an on-chip phase comparator that, when used in conjunction
with an external VCO, forms a PLL. This configuration allows a single reference clock to generate all
required frequencies for any display mode, obviating the need for multiple external crystals.
14.1.5 Display Modes
Irrespective of the memory configuration used, the video subsystem is capable of many different display
formats. In addition to the normal linear CRT display, the video subsystem can generate a display suitable
for either very high resolution displays, single or dual-panel LCDs.
For CRT displays, the video and sound macrocell is capable of operating in a variety of pixel modes: 1-,
2-, 4-, 8-, 16-, 32-bpp, and can also directly drive LCD displays in 1-, 2-, or 4-bpp through a patented,
internal, 16-level gray scalar algorithm.
14.1.6 Power Management
The macrocell is designed for power-sensitive applications and incorporates design features to minimize
power consumption. Power-down mode allows power savings when the device is not in use (for example,
in conjunction with a battery powered LCD system). Additional power-sensitive features include the pow-
ering down of functions currently not in use by the device (such as, the video DACs and the LCD gray
scalar). The palette design is segmented so that only one-eighth of the palette is enabled and clocked at
any one time. Power down mode can be used in conjunction with the STOP mode of the CL-PS7500FE
to ensure minimum power consumption when clocks are stopped.
14.1.7 On-chip Sound System
The CL-PS7500FE supports a 32-bit serial sound output suitable for driving external CD DACs. Enhanced
32-bit stereo sound is offered by the serial sound output, consisting of a three-pin serial interface. Each
32-bit sample consists of 16 bits for the left channel and 16 bits for the right channel.
136
June 1997
VIDEO AND SOUND MACROCELL
ADVANCE DATA BOOK v2.0
CIRRUS [ CIRRUS LOGIC ]
