CL-PS7111
Low-Power System-on-a-Chip
5.14 LCD Control Register — LCDCON ......................................................................................................60
5.15 Timer Counter 1 Data Register — TC1D .............................................................................................62
5.16 Timer Counter 2 Data Register — TC2D .............................................................................................62
5.17 Realtime Clock Data Register — RTCDR............................................................................................62
5.18 Realtime Clock Match Register — RTCMR .........................................................................................62
5.19 Pump Control Register — PMPCON ...................................................................................................63
5.20 Codec Interface Data Register — CODR.............................................................................................64
5.21 UART Data Registers — UARTDR1–2 ................................................................................................64
5.22 UART Bit Rate and Line Control Registers — UBRLCR1–2................................................................65
5.23 Synchronous Serial ADC Interface Data Register — SYNCIO............................................................67
5.24 Least-Significant Word-LCD Palette Register — PALLSW...................................................................68
5.25 Most-Significant Word-LCD Palette Register — PALMSW...................................................................68
5.26 Clear All Start Up Reason Flags Location — STFCLR........................................................................69
5.27 Battery Low End-of-Interrupt — BLEOI................................................................................................69
5.28 Media Changed End-of-Interrupt — MCEOI ........................................................................................69
5.29 Tick End-of-Interrupt Location — TEOI................................................................................................69
5.30 End--of-Interrupt Location — TC1EOI TC1..........................................................................................69
5.31 End-of-Interrupt Location — TC2EOI TC2 ...........................................................................................69
5.32 RTC Match End-of-Interrupt — RTCEOI..............................................................................................69
5.33 UART1 Modem Status Changed End-of-Interrupt — UMSEOI............................................................69
5.34 Codec End-of-Interrupt Location — COEOI.........................................................................................69
5.35 Enter Idle State Location — HALT .......................................................................................................69
5.36 Enter Standby State Location — STDBY.............................................................................................69
5.37 LCD Frame Buffer Start Address — FRBADDR ..................................................................................70
5.38 System Control Register 2 — SYSCON2 ............................................................................................70
5.39 System Status Flags Register 2 — SYSFLG2.....................................................................................71
5.40 Interrupt Status Register 2 — INTSR2.................................................................................................72
5.41 Interrupt Mask Register 2 — INTMR2..................................................................................................72
5.42 Keyboard End-of-Interrupt Location — KBDEOI..................................................................................72
6. ELECTRICAL SPECIFICATIONS.........................................................................................73
6.1 Absolute Maximum Ratings .................................................................................................................73
6.2 Recommended Operating Conditions..................................................................................................73
6.3 DC Characteristics ...............................................................................................................................74
6.4 AC Characteristics ...............................................................................................................................75
6.5 I/O Buffer Characteristics.....................................................................................................................87
6.6 Test Modes...........................................................................................................................................87
6.6.1 Oscillator and PLL Bypass Mode............................................................................................88
6.6.2 Functional (EPB) Test Mode....................................................................................................88
6.6.3 Oscillator and PLL Test Mode .................................................................................................88
6.6.4 Pin Test Mode..........................................................................................................................89
6.6.5 High-Z (System) Test Mode.....................................................................................................89
6.6.6 Software-Selectable Test Functionality....................................................................................90
7. PACKAGE SPECIFICATIONS...............................................................................................91
7.1 208-Pin VQFP Package Outline Drawing.............................................................................................91
8. ORDERING INFORMATION .................................................................................................92
A. BOOT CODE..........................................................................................................................93
BIT INDEX..............................................................................................................................99
INDEX ..................................................................................................................................101
September 1997
5
PRELIMINARY DATA BOOK v2.0
OVERVIEW
CIRRUS [ CIRRUS LOGIC ]
