CL-PS7110
Low-Power System-on-a-Chip
A CL-PS7110–Based System
CL-PS7110
WRITE
DD[3:0]
CS[4]
CS[5]
CL1
CL2
FM
M
LCD MODULE
KEYBOARD
EXPRDY
EXPCLK
WORD
D[31:0]
A[27:0]
COL[7:0]
PA[7:0]
PCMCIA
PCMCIA
SOCKET
BUFFERS
NMOE
NMWE
PB[7:0]
PC[7:0]
PD[7:0]
PE[3:0]
NRAS[3]
NRAS[2]
NRAS[1]
NRAS[0]
DC
INPUT
POWER
SUPPLY UNIT
AND
× 16
× 16
× 16
× 16
NCAS[0]
NCAS[1]
NPOR
NPWRFL
BATOK
COMPARATORS
DRAM
DRAM
DRAM
DRAM
BATTERY
NEXTPWR
NBATCHG
RUN
× 16
DRAM
× 16
DRAM
× 16
DRAM
× 16
DRAM
NCAS[2]
NCAS[3]
WAKEUP
NCS[0]
NCS[1]
DRIVE[1:0]
FB[1:0]
DC-TO-DC
CONVERTERS
× 16
× 16
FLASH
ROM
ADCCLK
NADCCS
ADCOUT
ADCIN
× 16
FLASH
× 16
ROM
ADC
DIGITIZER
SMPCLK
CS[6]
CS[7]
IR LED AND
PHOTODIODE
LEDDRV
PHDIN
EXTERNAL MEMORY
MAPPED EXPANSION
BUFFERS
RXD
TXD
DSR
CTS
DCD
RS232
TRANSEIVER
NCS[2]
NCS[3]
BUFFERS
AND
ADDITIONAL I/O
LATCHES
PCMCK
PCMSYNC
PCMOUT
PCMIN
CODEC
●
●
●
Standby — This state is equivalent to the com-
puter being switched off (no display), and the
main oscillator is shut down. Only the realtime
clock is running.
A separate synchronous serial interface sup-
ports two industry-standard protocols (SPI
and Microwire ) for interfacing to standard
devices such as an ADC, allowing for peripheral
expansion such as the use of a digitizer pen.
Idle — In this state, the device is functioning and
all oscillators are running, but the processor
clock is halted while waiting for an event such as
a key press.
Power Management
The CL-PS7110 is designed for low-power
operation.There are three basic power states:
Operating — This state is the same as the idle
state, except that the processor clock is running.
May 1997
3
DATA BOOK v1.5