欢迎访问ic37.com |
会员登录 免费注册
发布采购

CL-PD6833-VC-A 参数 Datasheet PDF下载

CL-PD6833-VC-A图片预览
型号: CL-PD6833-VC-A
PDF下载: 下载PDF文件 查看货源
内容描述: PCI到CardBus主机适配器 [PCI-to-CardBus Host Adapter]
分类和应用: PC
文件页数/大小: 216 页 / 1799 K
品牌: CIRRUS [ CIRRUS LOGIC ]
 浏览型号CL-PD6833-VC-A的Datasheet PDF文件第101页浏览型号CL-PD6833-VC-A的Datasheet PDF文件第102页浏览型号CL-PD6833-VC-A的Datasheet PDF文件第103页浏览型号CL-PD6833-VC-A的Datasheet PDF文件第104页浏览型号CL-PD6833-VC-A的Datasheet PDF文件第106页浏览型号CL-PD6833-VC-A的Datasheet PDF文件第107页浏览型号CL-PD6833-VC-A的Datasheet PDF文件第108页浏览型号CL-PD6833-VC-A的Datasheet PDF文件第109页  
CL-PD6833  
PCI-to-CardBus Host Adapter  
9.1  
I/O Window Mapping Registers  
I/O Window Control  
9.1.1  
Register Name: I/O Window Control  
I/O Index: 07h  
Register Per: socket  
Register Compatibility Type: 365  
Memory Offset: 807h  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
Timing  
Register  
Select 1  
Timing  
Register  
Select 0  
Compatibility Auto-Size I/O I/O Window 1  
Compatibility Auto-Size I/O I/O Window 0  
Bit  
Window 1  
R/W:0  
Size  
Bit  
Window 0  
R/W:0  
Size  
R/W:0  
R/W:0  
R/W:0  
R/W:0  
R/W:0  
R/W:0  
Bit 0 — I/O Window 0 Size  
8-bit data path to I/O Window 0.  
16-bit data path to I/O Window 0.  
0
1
When bit 1 of this register is ‘0’, this bit determines the width of the data path for I/O Window 0  
accesses to the card. When bit 1 is ‘1’, this bit is ignored.  
Bit 1 — Auto-Size I/O Window 0  
0
1
I/O Window 0 Size (see bit 0 of this register) determines the data path for I/O Window 0 accesses.  
The data path to I/O Window 0 is determined by the IOIS16# signal returned by the card.  
This bit determines the width of the data path for I/O Window 0 accesses to the card. Note that  
when this bit is ‘1’, the IOIS16# signal determines the width of the data path to the card.  
Bit 2 — Compatibility Bit  
Bit 3 — Timing Register Select 0  
0
1
Accesses made with timing specified in Timer Set 0 registers.  
Accesses made with timing specified in Timer Set 1 registers.  
This bit determines the access timing specification for I/O Window 0.  
Bit 4 — I/O Window 1 Size  
0
8-bit data path to I/O Window 1.  
16-bit data path to I/O Window 1.  
1
When bit 5 of this register is ‘0’, this bit determines the width of the data path for I/O Window 1  
accesses to the card. When bit 5 is ‘1’, this bit is ignored.  
Bit 5 — Auto-Size I/O Window 1  
0
1
I/O Window 1 Size (see bit 4 of this register) determines the data path for I/O Window 1 accesses.  
The data path to I/O Window 1 is determined based on IOIS16# returned by the card.  
This bit determines the width of the data path for I/O Window 1 accesses to the card. Note that  
when this bit is ‘1’, the IOIS16# signal determines the width of the data path to the card.  
June 1998  
105  
ADVANCE DATA BOOK v0.3  
WINDOW MAPPING REGISTERS