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CL-PD6833-QC-A 参数 Datasheet PDF下载

CL-PD6833-QC-A图片预览
型号: CL-PD6833-QC-A
PDF下载: 下载PDF文件 查看货源
内容描述: PCI到CardBus主机适配器 [PCI-to-CardBus Host Adapter]
分类和应用: 总线控制器微控制器和处理器外围集成电路数据传输PC时钟
文件页数/大小: 216 页 / 1799 K
品牌: CIRRUS [ CIRRUS LOGIC ]
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CL-PD6833  
PCI-to-CardBus Host Adapter  
10.1.4  
Gen Map 0–6 End Address High (I/O)  
Register Name: Gen Map 0–6 End Address High (I/O)  
I/O Index: 0Bh, 0Fh, 13h, 1Bh, 23h, 2Bh, 33h  
Register Per: socket  
Register Compatibility Type: 365  
Memory Offset: 80Bh, 80Fh, 813h, 81Bh, 823h, 82Bh, 833h  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
End Address 15:8 (I/O)  
R/W:00000000  
There are seven separate Gen Map End Address High registers, each with identical fields. These  
registers are located at the following indexes:  
Index  
Memory Offset  
Gen Map End Address High  
Default Operation  
0Bh  
0Fh  
13h  
1Bh  
23h  
2Bh  
33h  
80Bh  
80Fh  
813h  
81Bh  
823h  
82Bh  
833h  
Gen Map 5 End Address High  
Gen Map 6 End Address High  
Gen Map 0 End Address High  
Gen Map 1 End Address High  
Gen Map 2 End Address High  
Gen Map 3 End Address High  
Gen Map 4 End Address High  
I/O Window 0  
I/O Window 1  
Memory Window 0  
Memory Window 1  
Memory Window 2  
Memory Window 3  
Memory Window 4  
Bits 7:0 — End Address 15:8 (I/O)  
This register contains the most-significant byte of the address of the I/O space End Address.  
122  
June 1998  
GENERALWINDOW MAPPING REGISTERS  
ADVANCE DATA BOOK v0.3