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CL-PD6722-V 参数 Datasheet PDF下载

CL-PD6722-V图片预览
型号: CL-PD6722-V
PDF下载: 下载PDF文件 查看货源
内容描述: [PCMCIA Bus Controller, CMOS, PQFP208, VQFP-208]
分类和应用: PC外围集成电路
文件页数/大小: 4 页 / 101 K
品牌: CIRRUS [ CIRRUS LOGIC ]
 浏览型号CL-PD6722-V的Datasheet PDF文件第2页浏览型号CL-PD6722-V的Datasheet PDF文件第3页浏览型号CL-PD6722-V的Datasheet PDF文件第4页  
CL-PD6710/ PD6722
®
Preliminary Product Bulletin
FEATURES
s
Single-chip PCMCIA host adapters
s
Direct connection to ISA (PC AT) bus
s
Direct connection to PCMCIA socket
s
Compliant with PCMCIA 2.1 and JEIDA 4.1
s
82365SL-compatible register set,
ExCA™-compatible
s
Automatic Low-power Dynamic mode for lowest
power consumption
s
Programmable Suspend mode
s
Five programmable memory windows per socket
s
Two programmable I/O windows per socket
s
Programmable card access cycle timing
s
8- or 16-bit CPU interface
s
8- or 16-bit PCMCIA interface support
s
ATA disk interface support
s
DMA support (CL-PD6722)
s
Easy host interface using ISA I/O addresses
03E0h and 03E1h
s
Mixed-voltage (3.3V or 5V) operation
s
Single-socket interface: 144-pin VQFP for small-
est form factor (CL-PD6710)
s
Dual-socket interface: 208-pin PQFP and VQFP
(CL-PD6722)
PCMCIA Host Adapters
OVERVIEW
The CL-PD6710 and CL-PD6722 are single-chip
PCMCIA host adapter chips capable of controlling
one (CL-PD6710) or two (CL-PD6722) PCMCIA
sockets. The chips are fully PCMCIA-2.1 and JEIDA-
4.1 compliant and are optimized for use in notebook
and handheld computers where reduced form factor
and low power consumption are critical design objec-
tives. With the CL-PD6710, a complete PCMCIA
solution with power-control logic can occupy as little
as 1.5 square inches (excluding the connector). The
CL-PD6722 enables a complete dual-socket PCM-
CIA solution with power-control logic in less than 2
square inches (excluding connectors).
The CL-PD6710 and CL-PD6722 chips employ
energy-efficient mixed-voltage technology that can
reduce system power consumption by over 50 per-
cent. The chips also provide a Suspend mode, which
stops the internal clock, and an automatic Low-power
Dynamic mode, which stops transactions on the
PCMCIA bus, stops internal clock distribution, and
(cont.)
turns off much of the internal circuitry.
System
Block Diagram
PCMCIA SOCKET 1
.
......
......
......
......
......
......
......
......
......
......
.......
PC
Ca
rd
CL-PD6710
144-Pin VQFP
ISA (AT)
BUS
or
CL-PD6722
208-Pin PQFP and VQFP
PCMCIA SOCKET 2
(CL-PD6722)
.
......
......
......
......
......
......
......
......
......
......
.......
PC
Ca
rd
May 1997