CS61577
ANALOG SPECIFICATIONS
Parameter
(TA = -40°C to 85°C; TV+, RV+ = 5.0V
±5%;
GND = 0V)
Min
-
-13.6
500
-
20)
21)
22)
23)
0.4
6.0
300
-
-
-
-
-
-
UI
UI
UI
60
53
45
160
Typ
50k
-
-
0.30
65
65
50
175
Max
-
-
-
-
70
77
55
190
Units
Ω
dB
mV
V
% of peak
% of peak
% of peak
bits
Receiver
RTIP/RRING Input Impedance
Sensitivity Below DSX (0dB = 2.4V)
Loss of Signal Threshold
Data Decision Threshold
T1, DSX-1
(Note
T1, DSX-1
(Note
T1, (FCC Part 68) and E1 (Note
Allowable Consecutive Zeros before LOS
Receiver Input Jitter Tolerance
(Note
10kHz - 100kHz
2kHz
10Hz and below
Jitter Attenuator
Jitter Attenuation Curve Corner Frequency
(Notes 17, 24)
-
6
-
Hz
Attenuation at 10kHz Jitter Frequency
(Notes 17, 24)
-
50
-
dB
Attenuator Input Jitter Tolerance (Before Onset
12
23
-
UI
of FIFO Overflow or Underflow Protection)
(Notes 17, 24)
Notes: 20. For input amplitude of 1.2 V
pk
to 4.14 V
pk
.
21. For input amplitude of 0.5 V
pk
to 1.2 V
pk
and from 4.14 V
pk
to RV+.
22. For input amplitude of 1.05 V
pk
to 3.3 V
pk
.
23. Jitter tolerance increases at lower frequencies. See Figure 11.
24. Attenuation measured with input jitter equal to 3/4 of measured jitter tolerance. Circuit attenuates
jitter at 20 dB/decade above the corner frequency. See Figure 12. Output jitter can increase
significantly when more than 12 UI’s are input to the attenuator. See discussion in the text section.
4
DS155PP2
CIRRUS [ CIRRUS LOGIC ]
