U5
+5V
CON_BANANA
+5V_IN
TP40
TP77
LM317LZ
3.0V
IN
OUT
ADJ
3
2
J21
C40
C41
C42
C39
.1UF
1
Z4
P6KE6V8P
.1UF
22UF
10UF
D+
V+
GND
GND
C38
HDR18
HDR1X2
HDR16
HDR2X2
CON_BANANA
U4
1
2
.33UF
TANT
Do Not Populate
1
2
3
4
5
6
7
8
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
TP36
TP38
TP40
TP42
TP44
TP46
TP48
TP50
TP52
TP54
TP56
TP58
TP60
TP62
TP37
TP39
TP41
TP43
TP45
TP47
TP49
TP51
TP53
TP55
TP57
TP59
TP61
TP63
TP79
TP73
TP74
TP14
TP17
TP19
TP21
TP23
TP25
TP27
TP29
TP31
TP33
TP35
TP78
TP72
TP75
TP15
TP16
TP18
TP20
TP22
TP24
TP26
TP28
TP30
TP32
TP34
SCLK
SDO
FSO
SE
VD+
DGND
SCLK
VD+
SDO
FSO
C21
C14
.1UF
CPD
J20
CON_BANANA
C22
Z3
P6KE6V8P
C23
XIN
SE
XIN
47UF
10UF
/RESET
OWRS
/GAIN
AGND
/GAIN
/RESET
OWRS
.1UF
GND
VIN1+
VIN1-
IIN1+
IIN1-
VIN2+
VIN2-
IIN2+
IIN2-
VREFIN
VIN1+
VIN1-
IIN1+
IIN1-
VIN2+
VIN2-
IIN2+
IIN2-
J18
VREFOUT
9
VA+
C20
10
11
12
13
GND
GND
VA-
VIN3+
VIN3+
VIN3-
IN3+
GND
.1UF
VIN3-
IN3+
14
IN3-
IN3-
+3V
GND
V+
SSOP28_200_P65MM
C37
4.7UF
TANT
HDR17
HDR2X2
CON_BANANA
L1
3
1
4
2
R2
10
U2
A+
FERRITE_BEAD
1
2
3
4
5
6
7
8
9
10
11
12
13
28
SCLK
VD+
DGND
SCLK
SDO
27
26
25
24
23
22
21
20
19
18
17
16
15
J14
P6KE6V8P
Z2
C17
.1UF
SDO
FSO
SE
C13
R3
4.99K
CPD
47UF
FSO
TP40
TP76
XIN
SE
/GAIN
XIN
/RESET
OWRS
TP40
TP1
HDR3X2
HDR14
/RESET
OWRS
/GAIN
AGND
2
4
6
1
3
5
VIN1+
VIN1-
IIN1+
IIN1-
VIN2+
VIN2-
IIN2+
IIN2-
VREFIN
VIN1+
VIN1-
IIN1+
IIN1-
VIN2+
VIN2-
IIN2+
IIN2-
VREFOUT
1.2V
2
VA+
+3V
C19
D3
VA-
GND
C16
LT1004
VIN3+
VIN3+
VIN3-
IN3+
VIN3-
IN3+
GND
3
.1UF
.1UF
14
EXT_IN
IN3-
IN3-
SKT_SSOP28_ENP
GND
HDR3X2
HDR15
GND
GND
4.0960MHZ
GND
CON_BANANA
2
4
6
1
3
5
7
EXT VREF
C18
XIN
TP2
TP40
8
J16
.1UF
R32
10
VCC
D+
14
TANT
4.7UF
U1
C36
CON_BANANA
GND
C2.1UF
A-
C11
D2
J15
BAT85
GND
.039UF
TANT
Z1
P6KE6V8P
D1
BAT85
C15
2.2UF
47UF
C1
.1UF
C12
GND
GND
Figure 1. Power Supply, CS5471, and Oscillator
CIRRUS [ CIRRUS LOGIC ]
