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CDB5381 参数 Datasheet PDF下载

CDB5381图片预览
型号: CDB5381
PDF下载: 下载PDF文件 查看货源
内容描述: 120分贝, 192千赫,多比特音频A / D转换器 [120 dB, 192 kHz, Multi-Bit Audio A/D Converter]
分类和应用: 转换器
文件页数/大小: 24 页 / 293 K
品牌: CIRRUS [ CIRRUS LOGIC ]
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CS5381
1. PIN DESCRIPTIONS
RST
M/S
LRCK
SCLK
MCLK
VD
GND
VL
SDOUT
MDIV
HPF
I²S/LJ
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
FILT+
REFGND
VQ
AINR+
AINR-
VA
GND
AINL-
AINL+
OVFL
M1
M0
Pin Name
RST
M/S
LRCK
SCLK
MCLK
VD
GND
VL
SDOUT
MDIV
HPF
I²S/LJ
M0
M1
OVFL
AINL+
AINL-
VA
AINR-
AINR+
VQ
REF_GND
FILT+
#
1
2
3
4
5
6
7,18
8
9
10
11
12
Pin Description
Reset
(Input) - The device enters a low power mode when low.
Master/Slave Mode
(Input)
- Selects operation as either clock master or slave.
Left Right Clock
(Input/Output) - Determines which channel, Left or Right, is currently active on the
serial audio data line.
Serial Clock
(Input/Output) - Serial clock for the serial audio interface.
Master Clock
(Input) - Clock source for the delta-sigma modulator and digital filters.
Digital Power
(Input)
-
Positive power supply for the digital section.
Ground
(Input) - Ground reference. Must be connected to analog ground.
Logic Power
(Input)
-
Positive power for the digital input/output.
Serial Audio Data Output
(Output) - Output for two’s complement serial audio data.
MCLK Divider
(Input)
-
Enables a master clock divide by two function.
High-Pass Filter Enable
(Input)
- Enables the Digital High-Pass Filter.
Serial Audio Interface Format Select
(Input) -Selects either the left-justified or I²S format for the SAI.
13,14
Mode Selection
(Input) - Determines the operational mode of the device.
15
16, 17
19
20, 21
22
23
24
Overflow
(Output, open drain)
-
Detects an overflow condition on both left and right channels.
Differential Left Channel Analog Input
(Input) - Signals are presented differentially to the delta-sigma
modulators via the AINL+/- pins.
Analog Power
(Input)
-
Positive power supply for the analog section.
Differential Right Channel Analog Input
(Input) -Signals are presented differentially to the delta-
sigma modulators via the AINR+/- pins.
Quiescent Voltage
(Output)
-
Filter connection for the internal quiescent reference voltage.
Reference Ground
(Input) - Ground reference for the internal sampling circuits.
Positive Voltage Reference
(Output)
-
Positive reference voltage for the internal sampling circuits.
4
DS563F2