欢迎访问ic37.com |
会员登录 免费注册
发布采购

CDB4265 参数 Datasheet PDF下载

CDB4265图片预览
型号: CDB4265
PDF下载: 下载PDF文件 查看货源
内容描述: 评估板CS4265 [Evaluation Board for CS4265]
分类和应用:
文件页数/大小: 30 页 / 1730 K
品牌: CIRRUS [ CIRRUS LOGIC ]
 浏览型号CDB4265的Datasheet PDF文件第6页浏览型号CDB4265的Datasheet PDF文件第7页浏览型号CDB4265的Datasheet PDF文件第8页浏览型号CDB4265的Datasheet PDF文件第9页浏览型号CDB4265的Datasheet PDF文件第11页浏览型号CDB4265的Datasheet PDF文件第12页浏览型号CDB4265的Datasheet PDF文件第13页浏览型号CDB4265的Datasheet PDF文件第14页  
CDB4265  
3.4.2 SPDIF Recovered Clock - SPDIF In to DAC - ADC to SPDIF Out  
Using the pre-configured script file named “SPDIF Recovered Clock - SPDIF In to DAC - ADC to SPDIF  
Out.txt”, an analog input signal applied to the line level inputs of the CS4265 input multiplexer will be digi-  
tized by the ADC and transmitted in S/PDIF format by the CS4265 internal S/PDIF transmitter. The S/PDIF  
signal received by the CS8416 will be recovered, decoded into PCM, and routed to the CS4265 DAC where  
it will be converted to analog by the DAC and output through the passive output filter. For proper operation  
of this script, a valid S/PDIF signal must be applied.  
The CS8416 recovered clock is the source of MCLK. The CS8416 is also the sub-clock master to the  
CS4265 and the PCM I/O header.  
10  
DS657DB1