CS4223 CS4224
SWITCHING CHARACTERISTICS (TA = 25° C; VA, VD = 4.75 V - 5.25 V; outputs loaded with
30 pF)
Parameter
Symbol
Min
4
Typ
Max
50
Unit
kHz
Audio ADC’s and DAC’s Sample Rate
Fs
-
-
XTI Frequency
XTI = 256, 384, or 512 Fs
1.024
26
MHz
XTI Pulse Width High
XTI = 512 Fs
XTI = 384 Fs
XTI = 256 Fs
13
21
31
-
-
-
-
-
-
ns
ns
ns
XTI Pulse Width Low
XTI = 512 Fs
XTI = 384 Fs
XTI = 256 Fs
13
21
31
-
-
-
-
-
-
ns
ns
ns
XTI Jitter Tolerance
-
10
-
500
-
-
psRMS
ms
ns
RST Low Time
(Note 10)
DSCK = 0
-
-
-
-
-
-
-
-
-
-
1
SCLK falling edge to SDOUT output valid
LRCK edge to MSB valid
SDIN setup time before SCLK rising edge
SDIN hold time after SCLK rising edge
SCLK Period
tdpd
tlrpd
tds
--------------------- + 20
(384) Fs
-
45
-
ns
DSCK = 0
DSCK = 0
25
25
ns
tdh
-
ns
1
tsckw
tsckh
tsckl
tlrckd
tlrcks
---------------------
(128) Fs
-
ns
SCLK High Time
40
40
35
40
-
ns
SCLK Low Time
-
ns
SCLK rising to LRCK edge
LRCK edge to SCLK rising
DSCK = 0
DSCK = 0
-
ns
-
ns
Notes: 10. After powering up the CS4223/4, PDN should be held low for 10 ms to allow the power supply to settle.
LRCK
t
t
t
t
lrckd
lrcks
sckh
sckl
SCLK*
SDIN
t
sckw
t
t
t
lrpd
t
ds
dh
dpd
SDOUT
MSB
MSB-1
*SCLK shown for DSCK = 0, SCLK inverted for DSCK = 1.
Figure 1. Serial Audio Port Data I/O Timing
DS290PP3
7
CIRRUS [ CIRRUS LOGIC ]
