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5962-9169202M3A 参数 Datasheet PDF下载

5962-9169202M3A图片预览
型号: 5962-9169202M3A
PDF下载: 下载PDF文件 查看货源
内容描述: [ADC, Successive Approximation, 16-Bit, 1 Func, 2 Channel, Serial Access, CMOS, CQCC28, LCC-28]
分类和应用: 转换器
文件页数/大小: 48 页 / 628 K
品牌: CIRRUS [ CIRRUS LOGIC ]
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CS5101A
VA+, VD+ = 5V
±
10%;
VA-, VD- = -5V
±
10%; Inputs: Logic 0 = 0V, Logic 1 = VD+; C
L
= 50 pF)
SWITCHING CHARACTERISTICS
(T
A
= T
MIN
to T
MAX
;
Parameter
CLKIN Period
(Note 4)
-8
-16
Symbol
t
clk
t
clk
t
clkl
t
clkh
(Note 13)
-8
-16
(Note 14)
f
xtal
f
xtal
-
t
rst
t
drrs
t
cal
(Note 15)
(Note 15)
(Note 16)
(Note 16)
(Note 16)
(Note 17)
(Note 16)
(Note 17)
t
drsh1
t
dfsh4
t
dfsh2
t
dfsh1
t
drsh
t
hold
t
dhlri
t
hcf
Min
108
250
37.5
37.5
2.0
2.0
-
150
-
-
-
-
-
66t
clk
-
1t
clk
+20
15
95
Typ
-
-
-
-
-
-
2
-
100
11,528,160
80
-
60
-
120
-
-
-
Max
10,000
10,000
-
-
9.216
4.0
-
-
-
-
-
68t
clk
+260
68t
clk
+260
-
63t
clk
64t
clk
1tclk+10
Units
ns
ns
ns
ns
MHz
MHz
ms
ns
ns
t
clk
ns
ns
ns
ns
ns
ns
ns
ns
CLKIN Low Time
CLKIN High Time
Crystal Frequency
SLEEP Rising to Oscillator Stable
RST Pulse Width
RST to STBY Falling
RST Rising to STBY Rising
CH1/2 Edge to TRK1, TRK2 Rising
CH1/2 Edge to TRK1, TRK2 Falling
HOLD to SSH Falling
HOLD to TRK1, TRK2, Falling
HOLD to TRK1, TRK2, SSH Rising
HOLD Pulse Width
HOLD to CH1/2 Edge
HOLD Falling to CLKIN Falling
Notes: 13. External loading capacitors are required to allow the crystal to oscillate. Maximum crystal frequency
is 8.0 MHz in FRN mode (100 kHz sample rate).
14. With a 8 MHz crystal, two 10 pF loading capacitors and a 10 MΩ parallel resistor (see Figure 8).
15. These times are for FRN mode.
16. SSH only works correctly if HOLD falling edge is within +15 to +30 ns of CH1/2 edge or if CH1/2 edge
occurs after HOLD rises to 64 t
clk
after HOLD has fallen. These times are for PDT and RBT modes.
17. When HOLD goes low, the analog sample is captured immediately. To start conversion, HOLD must
be latched by a falling edge of CLKIN. Conversion will begin on the next rising edge of CLKIN after
HOLD is latched. If HOLD is operated synchronous to CLKIN, the HOLD pulse width may be as
narrow as 150 ns for all CLKIN frequencies if CLKIN falls 95 ns after HOLD falls. This
ensures that the HOLD pulse will meet the minimum specification for t
hcf
.
4
DS45F2