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CS8129YDWR16 参数 Datasheet PDF下载

CS8129YDWR16图片预览
型号: CS8129YDWR16
PDF下载: 下载PDF文件 查看货源
内容描述: 5V , 750毫安低压差线性稳压器,具有低复位阈值 [5V, 750mA Low Dropout Linear Regulator with Lower RESET Threshold]
分类和应用: 稳压器
文件页数/大小: 8 页 / 191 K
品牌: CHERRY [ CHERRY SEMICONDUCTOR CORPORATION ]
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CS8129
RESET Circuit Waveform
V
OUT
V
RT(ON)
V
RT(OFF)
V
RH
(1) = No Delay Capacitor
(2) = With Delay Capacitor
(3) = Max: RESET Voltage (1.0V)
RESET
(1)
(2)
V
RL
(3)
t
Delay
Delay
V
DH
V
DC(HI)
V
DC(LO)
V
DIS
(2)
RESET Circuit Functional Description
The CS8129
RESET
function has hysteresis on both the
reset and delay comparators, a latching Delay capacitor
discharge circuit, and operates down to 1V.
The
RESET
circuit output is an open collector type with
ON and OFF parameters as specified. The
RESET
output
NPN transistor is controlled by the two circuits described
(see Block Diagram).
put voltage is above V
RT(ON)
. Otherwise, the Delay lead
sinks current to ground (used to discharge the delay
capacitor). The discharge current is latched ON when the
output voltage is below V
RT(OFF)
. The Delay capacitor is
fully discharged anytime the output voltage falls out of
regulation, even for a short period of time. This feature
ensures a controlled RESET pulse is generated following
detection of an error condition. The circuit allows
the RESET output transistor to go to the OFF (open) state
only when the voltage on the Delay lead is higher than
V
DC(HI)
.
The Delay time for the RESET function is calculated from
the formula:
Delay time =
C
Delay
x V
Delay Threshold
I
Charge
x
Low Voltage Inhibit Circuit
This circuit monitors output voltage, and when output
voltage is below the specified minimum causes the
RESET
output transistor to be in the ON (saturation)
state. When the output voltage is above the specified level,
this circuit permits the
RESET
output transistor to go into
the OFF state if allowed by the
RESET
Delay circuit.
Reset Delay Circuit
Delay time = C
Delay(µF)
x
3.2
10
5
This circuit provides a programmable (by external capaci-
tor) delay on the RESET output lead. The Delay lead pro-
vides source current to the external delay capacitor only
when the "Low Voltage Inhibit" circuit indicates that out-
If C
Delay
=0.1µF, Delay time (ms)=32ms ± 50%: i.e. 16ms to
48ms. The tolerance of the capacitor must be taken into
account to calculate the total variation in the delay time.
5