CS8121
Circuit Description: continued
If the input voltage rises above 30V (e.g. load dump), the
output shuts down. This response protects the internal cir-
cuitry and enables the IC to survive unexpected voltage
transients.
Using an emitter sense scheme, the amount of current
through the NPN pass transistor is monitored. Feedback
circuitry insures that the output current never exceeds a
preset limit.
Should the junction temperature of the power device
exceed 180ûC (typ) the power transistor is turned off.
Thermal shutdown is an effective means to prevent die
overheating since the power transistor is the principle
heat source in the IC.
Regulator Control Functions
The CS8121 contains two microprocessor compatible con-
trol functions: ENABLE and RESET (Figure 3).
FOR 7V < V
IN
< 26V
RESET Function
A RESET signal (low voltage) is generated as the IC pow-
ers up (V
OUT
> V
OUT
- 100mV) or when V
OUT
drops out of
regulation (V
OUT
< V
OUT
- 140mV, typ). 40mV of hysteresis
is included in the function to minimize oscillations.
The RESET output is an open collector NPN transistor,
controlled by a low voltage detection circuit. The circuit is
functionally independent of the rest of the IC, thereby
guaranteeing that the RESET signal is valid for V
OUT
as
low as 1V.
An external RC network on the RESET lead (Figure 4) pro-
vides a sufficiently long delay for most microprocessor
based applications. RC values can be chosen using the
following formula:
Ðt
Delay
R
TOT
´
C
RST
[
ln
(
V
T
Ð V
OUT
V
RST
Ð V
OUT
)
]
V
IN
where:
R
TOT
= R
RST
in parallel with R
IN
,
R
IN
= µP port impedance,
C
RST
= RESET delay capacitor,
HI
V
IN(HI)
LO
V
RT(ON)
V
RT(OFF)
ENABLE
t
Delay
= desired delay time,
V
RST
= V
SAT
of RESET lead (0.7V @ turn - on), and
V
T
= µP logic threshold voltage.
V
OUT
(1)
VR
PEAK
V
OUT
(2)
VR
PEAK
SAT
RESET
VR
(1) = NO RESET DELAY CAPACITOR
(2) = WITH RESET DELAY CAPACITOR
CS8121
RESET
R
RST
10mF
tantalum
5V to
mP
and
System
Power
Figure 3. Circuit Waveforms for the CS8121
to
mP
RESET
Port
C
RST
ENABLE Function
The ENABLE function switches the output transistor.
When the voltage on the ENABLE lead exceeds 2.9V typ,
the output pass transistor turns off, leaving a high
impedance facing the load. The IC will remain in Sleep
mode, drawing only 250µA, until the voltage on the lead
drops below 2.1V typ. Hysteresis (800mV) is built into the
ENABLE function to provide good noise immunity.
Figure 4. RC Network for RESET Delay
5
CHERRY [ CHERRY SEMICONDUCTOR CORPORATION ]
