CS5651
Operating Description: continued
ter capacitor. Ceramic bypass capacitors (0.1µF) connected
directly to V
CC
and V
REF
may be required to improve noise
filtering. This provides a low impedance path for filtering
the high frequency noise. All high current loops should be
kept as short as possible using heavy copper runs. The
error amp compensation circuitry and the converter out-
put voltage-divider should be located close to the IC and
as far as possible from the power switch and other noise
generating components.
Timing Diagram
SYNC
Capacitor C
T
Latch 1
“Set” Input
COMP
1
Sense
1
Latch 1
“Reset” Input
V
OUT1
ENABLE
2
0V
Latch 2
“Set” Input
COMP
2
Sense
2
Latch 2
“Reset” Input
V
OUT2
Typical Application Diagram
Dual Boost Regulator
V
CC
CF1 +
VIN
5.0V
CF2
V
REF
2.5V
R
Sync
V
OUT
1
R
FB
1
R
FB
2
V
FB
1
COMP
1
ENABLE
2
V
OUT
2
R
FB
3
R
FB
4
V
FB
2
COMP
2
+
-
Error
Amp 2
+
-
Error
Amp 1
+
Oscillator
Current Sense
2R Comparator 1
+
-
1.0V
REF
R
+ 1.0V
R
Internal
Bias
+
3.4V
-
20kΩ
Reference
Regulator
+
-
+
-
V
CC
+
UVLO -
14V
L1
D1
+
Q1
L2
V
OUT
1
C
OUT
1
V
REF
UVLO
R
T
C
T
PWM
Latch 1
S
RQ
V
OUT
1
RSense1
Sense
1
Q2
D2
+
V
OUT
2
C
OUT
2
250µA
+
Current Sense
Comparator 2
2R
+
-
1.0mA
R
1.0V
PWM
Latch 2
S
RQ
R
V
OUT
2
Sense
2
RSense2
Gnd
Pwr Gnd
7
CHERRY [ CHERRY SEMICONDUCTOR CORPORATION ]
