Application Information: continued
11) Place the VFB filter resistor in series with the
14) Place the VCC bypass capacitor as close as possible to
the VCC pin and connect it to the PGnd pin of the IC.
Connect the PGnd pin directly to the Gnd plane.
VFB pin (pin 16) right at the pin.
12) Place the VFB filter capacitor right at the VFB pin (pin
16).
15) Create a subground (local Gnd) plane preferably on
the PCB top layer and under the IC controller. Connect all
logic capacitor returns and the LGnd pin of the IC to this
plane. Connect the subground plane to the main Gnd
plane using a minimum of four (4) vias.
13) The “Droop” Resistor (embedded PCB trace) has to be
wide enough to carry the full load current.
Typical Performance Characteristics
200
180
160
140
120
100
200
180
160
140
120
100
80
80
60
40
20
V
=12V
CC
60
40
20
0
T =25C˚
V
=12V
A
CC
T =25C˚
A
0
0
2000 4000 6000 8000 10000 12000 14000 16000
Load Capacitance (pF)
0
2000 4000 6000 8000 10000 12000 14000 16000
Load Capacitance (pF)
Figure 29: GATE(L) Risetime vs. Load Capacitance.
Figure 32: GATE(H) Risetime vs. Load Capacitance.
200
180
160
0.04
0.02
140
120
100
0
-0.02
80
60
40
20
0
-0.04
-0.06
VCC=12V
TA=25C˚
-0.08
-0.1
0
2000 4000 6000 8000 10000 12000 14000 16000
Load Capacitance (pF)
0
20
40
60
80
100
120
Junction Temperature (˚C)
Figure 30: GATE(H) & GATE(L) Falltime vs. Load Capacitance.
Figure 33: DAC Output Voltage vs Temperature, DAC Code = 10111,
VCC = 12V.
0.04
0.05
0
0.02
0
-0.05
-0.02
-0.04
-0.06
-0.1
-0.15
-0.08
-0.2
-0.1
-0.25
1.325 1.375 1.425 1.475 1.525 1.575 1.625 1.675 1.725 1.775 1.825 1.875 1.925 1.975 2.025 2.075
2.125 2.225 2.325 2.425 2.525 2.625 2.725 2.825 2.925 3.025 3.125 3.225 3.325 3.425 3.525
DAC Output Voltage Setting (V)
DAC Output Voltage Setting (V)
Figure 31: Percent Output Error vs DAC Voltage Setting,
Figure 34: Percent Output Error vs. DAC Output Voltage Setting
VCC = 12V, TA = 25˚C, VID4 = 0.
VCC = 12V, TA = 25˚C, VID4 = 1.
20
CHERRY [ CHERRY SEMICONDUCTOR CORPORATION ]
