Applications Information: continued
The bottom FET and board trace must be properly
designed to implement the OVP function.
5V
MMUN2111T1 (SOT-23)
5
SS
CS5155
8
V
FFB
IN4148
Shutdown
Input
Figure 14: Implementing shutdown with the CS5155.
External Power Good Circuit
Trace 4 = 5V from PC Power Supply (5V/div.)
Trace1 = Regulator Output Voltage (1V/div.)
Trace 2 = Inductor Switching Node (5V/div.)
An optional Power Good signal can be generated through
the use of four additional external components (see Figure
15). The threshold voltage of the Power Good signal can be
adjusted per the following equation:
Figure 12: OVP response to an input-to-output short circuit by immedi-
ately providing 0% duty cycle, crow-barring the input voltage to
ground.
(R1 + R2) ´ 0.65V
VPower Good
=
R2
This circuit provides an open collector output that drives
the Power Good output to ground for regulator voltages
less than VPower Good
.
5V
R3
Power Good
PN3904
10k
R1
10k
PN3904
V
OUT
CS5155
R2
6.2k
Trace 4 = 5V from PC Power Supply (2V/div.)
Trace 1 = Regulator Output Voltage (1V/div.)
Figure 15: Implementing Power Good with the CS5155.
Figure 13: OVP response to an input-to-output short circuit by pulling
the input voltage to ground.
External Output Enable Circuit
On/off control of the regulator can be implemented
through the addition of two additional discrete compo-
nents (see Figure 14). This circuit operates by pulling the
soft start pin high, and the VFFB pin low, emulating a short
circuit condition.
10
CHERRY [ CHERRY SEMICONDUCTOR CORPORATION ]
