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CS5150 参数 Datasheet PDF下载

CS5150图片预览
型号: CS5150
PDF下载: 下载PDF文件 查看货源
内容描述: CPU 4位同步降压控制器 [CPU 4-Bit Synchronous Buck Controller]
分类和应用: 控制器
文件页数/大小: 14 页 / 238 K
品牌: CHERRY [ CHERRY SEMICONDUCTOR CORPORATION ]
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Applications Information: continued  
5V  
MMUN2111T1 (SOT-23)  
5
8
SS  
CS5150  
V
FFB  
IN4148  
Shutdown  
Input  
Figure 14: Implementing shutdown with the CS5150.  
Trace 3 = 12V Input (V  
) and V  
) (10V/div.)  
CC1  
CC2  
Trace 4 = 5V Input (2V/div.)  
Trace 1 = Regulator Output Voltage (1V/div.)  
Trace 2 = Power Good Signal (2V/div.)  
External Power Good Circuit  
An optional Power Good signal can be generated through  
the use of four additional external components (see Figure  
15). The threshold voltage of the Power Good signal can be  
adjusted per the following equation:  
Figure 16: CS5150 demonstration board during power up. Power Good  
signal is activated when output voltage reaches 1.70V.  
Selecting External Components  
The CS5150 can be used with a wide range of external  
power components to optimize the cost and performance of  
a particular design. The following information can be used  
as general guidelines to assist in their selection.  
(R1 + R2) × 0.65V  
VPower Good  
=
R2  
This circuit provides an open collector output that drives  
the Power Good output to ground for regulator voltages  
less than VPower Good  
.
NFET Power Transistors  
Both logic level and standard MOSFETs can be used. The  
reference designs derive gate drive from the 12V supply  
which is generally available in most computer systems and  
utilize logic level MOSFETs. A charge pump may be easily  
implemented to support 5V only systems. Multiple  
MOSFETs may be paralleled to reduce losses and improve  
efficiency and thermal management.  
5V  
R3  
Power Good  
PN3904  
10k  
R1  
10k  
PN3904  
V
OUT  
Voltage applied to the MOSFET gates depends on the  
application circuit used. Both upper and lower gate driver  
outputs are specified to drive to within 1.5V of ground  
when in the low state and to within 2V of their respective  
bias supplies when in the high state. In practice, the MOS-  
FET gates will be driven rail to rail due to overshoot caused  
by the capacitive load they present to the controller IC. For  
the typical application where VCC1 = VCC2 = 12V and 5V is  
used as the source for the regulator output current, the fol-  
lowing gate drive is provided;  
CS5150  
R2  
6.2k  
Figure 15: Implementing Power Good with the CS5150.  
VGATE(H) = 12V - 5V = 7V, VGATE(L) = 12V (see Figure 17).  
10