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CS5127 参数 Datasheet PDF下载

CS5127图片预览
型号: CS5127
PDF下载: 下载PDF文件 查看货源
内容描述: 双输出非同步降压控制器,具有同步功能及二通道启用 [Dual Output Nonsynchronous Buck Controller with Sync Function and Second Channel Enable]
分类和应用: 控制器
文件页数/大小: 24 页 / 296 K
品牌: CHERRY [ CHERRY SEMICONDUCTOR CORPORATION ]
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Applications Information: continued  
divider. This factor will further reduce the overall system  
gain.  
1 + s(3.3E-5)  
s2(2.772E-9) + s(2.902E-5) + 0.42  
By adding the two pole, one zero compensation network  
shown in figure 6, we can maximize the DC gain and push  
out the crossover frequency. The transfer function for the  
compensation network is  
The zero frequency due to the output capacitor ESR is  
given as  
1
= 4.8 kHz.  
(2¹CRC)  
VCONTROL  
s C1(R1 + R2) + 1  
=
VFB  
-s C2 R1(s C1 R2 + 1)  
The double pole frequency of the power output stage is  
This can be rewritten in terms of pole and zero frequencies  
and a gain constant A.  
1
(2¹)  
R + R1  
LC(R + RC)  
VCONTROL  
s/(2¹fZ + 1)  
-A s ((s/2fP) + 1)  
=
= 1.95 kHz.  
=
VFB  
1
The ESR zero approximately cancels one of the poles, and  
the total phase shift is limited to 90. Bode plots are provid-  
ed below.  
fZ =  
where  
(2¹ C1 (R1 + R2))  
1
fP =  
and A = R1 C2  
2¹ C1R2  
20  
0
-20  
-40  
Note that, due to the first s term in the denominator, a pole  
is located at f = 0. This will provide the maximum DC  
gain.  
The optimum performance can be obtained by choosing fZ  
equal to the output double pole frequency and setting fP to  
approximately half of the switching frequency. Gain fac-  
tors can be chosen somewhat arbitrarily.  
Values between  
-60.0  
2
3
4
5
6
7
1
10  
10  
10  
10  
10  
10  
10  
1E-6½F and 20E-6½F are practical. We then have a set of  
equations that can be solved for component values:  
Frequency (Hz)  
Figure 7: Bode plot of gain response for VOUT/VCONTROL  
.
1
1
1
1
A
C1 R1  
-
, C1 R2 =  
, C2 =  
=
90  
2¹  
fZ  
fP  
2¹fP  
R1  
[
]
0
-90  
Since there are only three equations, we must arbitrarily  
choose one of the components. One option is to set the  
value of R1 fairly large. This provides a high impedance  
path between the VFB pin and the COMP pin.  
-180  
For our design, we have fZ = the double pole frequency =  
1.95 kHz and fP = fOSC/2 = 100kHz. LetÕs arbitrarily choose  
R1 = 4.7K. Then we solve the first equation for C1 and  
obtain C1 = 17nF. Use a standard value of 22 nF.  
-270.0  
2
3
4
5
6
7
1
10  
10  
10  
10  
10  
10  
10  
Frequency (Hz)  
We next solve for R2. With C1 =22 nF, R2= 72½. Use a  
standard value of 75½.  
Figure 8: Bode plot of phase response for VOUT/VCONTROL  
.
We can choose a gain factor from somewhere in the  
middle of our range and solve for C2. If A = 10E-6½F, we  
have  
This uncompensated system is stable, but the low gain will  
result in poor DC accuracy, and the low cutoff frequency  
will result in poor transient response. Note that we have  
not yet included the gain factor from the feedback resistor  
C2 = 2.1 nF. Use a standard value of 2.2 nF.  
12  
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