CM6901
SLS (SRC/LLC+SR) Controller with 1 FM+2 PWMs
Vref
RT
+
-
VFB
2.5V
V To I
OSC
CT
RSET
2 PWMings:
SR Ideal Diode PWMing (Synchronous Outputs)
SR Ideal Diode PWMing for synchronous drivers is accomplished by comparing the voltage signal at the RSET pin
to RTCT ramp. The pulse-width reduction happens when the voltage at the RSET is lower than 1.5V. This allows
safe operation of the power converter with synchronous rectification when the switching frequency is below the
highest resonant point frequency fr1.
Vout
Vref
3V
Rf1
RT
VFB
1.25V
+
FEAO
+
V To I
OSC
To
Logic
Rf3
-
2.5V
-
1.5V
CT
RSET
Rf4
Decreasing Pulsewidth
with V(RSET)<1.5V
SRDRV
PRIDRV
2009/11/02 Rev1.4
Champion Microelectronic Corporation
Page 10
CHAMP [ CHAMPION MICROELECTRONIC CORP. ]
