CM6802A/B/AH/BH (Dynamic Soft PFC/Green PWM)
http://www.championmicro.com.tw
EPA/80++ ZVS-Like PFC/PWM COMBO CONTROLLER
Design for High Efficient Power Supply at both Full Load and Light Load
In case of leading edge modulation, the switch is turned
OFF right at the leading edge of the system clock. When the
modulating ramp reaches the level of the error amplifier output
voltage, the switch will be turned ON. The effective duty-cycle
of the leading edge modulation is determined during OFF time
of the switch.
Figure 5 shows a leading edge control scheme.
One of the advantages of this control technique is that it
required only one system clock. Switch 1(SW1) turns off and
switch 2 (SW2) turns on at the same instant to minimize the
momentary “no-load” period, thus lowering ripple voltage
generated by the switching action. With such synchronized
switching, the ripple voltage of the first stage is reduced.
Calculation and evaluation have shown that the 120Hz
component of the PFC’s output ripple voltage can be reduced
by as much as 30% using this method.
2009/11/02 Rev. 1.4
Champion Microelectronic Corporation
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CHAMP [ CHAMPION MICROELECTRONIC CORP. ]
