CM6500UN (1MHz PFC)
http://www.championmicro.com.tw
EPA/90+ ZVS-Like PFC CONTROLLER
Design for High Efficient Power Supply at both Full Load and Light Load
PGTHL is an input I/O. The user can program the Low
6
PGTHL
0
VREF
4
V
V
Threshold of the Power Good which can determine the
comparator output of PGB (open drain) to be pulled high.
7
8
RTCT
GND
0.8
Oscillator timing node; timing set by RT and CT
Ground
PGB is the PG comparator output. The input of PG
comparator is using Vfb (pin 13) to compare with the high
threshold 2.25V (preset internally) and the low threshold
comparator with PGTHL (pin 6, Set up by user).
When Bulk Voltage 380V is ready, pin 9 is open-drain
and it will be pulled low.
9
PGB
0
VCC
V
When Bulk Voltage Drop (VFB=PGTHL) set up point it
will be pulled high.
10
11
PFC OUT
VCC
0
VCC
20
PFC driver output
V
V
Positive supply for CM6500UN
10
15
Note : Vcc must keep 11.5V(U.V.L.O high) or above
for the sufficient turn on voltage
Maximum 3.5mA buffered output for the internal 7.5V
reference when VCC=14V
12
VREF
7.5
2.5
V
13
14
VFB
0
0
3
6
V
V
PFC transconductance voltage error amplifier input
PFC transconductance voltage error amplifier output
(GMv)
VEAO
2014/11/11 Rev. 1.0
Champion Microelectronic Corporation
3
CHAMP [ CHAMPION MICROELECTRONIC CORP. ]
