24LLC02
2K-Bits Serial EEPROM For Low Power
POLLING FOR AN ACK SIGNAL
When the master issues a stop condition to initiate a write cycle, the 24LLC02 starts an internal write cycle.
The master can then immediately begin polling for an ACK from the slave device.
To poll for an ACK signal in a write operation, the master issues a start condition followed by the slave address.
As long as the 24LLC02 remains busy with the write operation, no ACK is returned. When the 24LLC02
completes the write operation, it returns an ACK and the master can then proceed with the next read or write
operation (see Figure 1-11).
Send Write
Command
Send Stop Condition to
Initiate Write Cycle
Send Start
Condition
Send Slave Address
with R/ W bit = "0"
No
ACK = "0" ?
Yes
Start Next
Operation
Figure 1-11. Master Polling for an ACK Signal from a Slave Device
* All specs and applications shown above subject to change without prior notice.
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Rev 1.0 Dec. 26, 2001
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