24LC02
2048-Bits Serial EEPROM with Write Protect
!
7* 6
Tf
Tlow
Thigh
Tr
Tlow
SCL
Thd:Sta
Tsu:Dat
Tsu:Sta
Thd:Dat
Tsu:Sta
SDA
IN
Tbuf
Taa
Tdh
SDA
OUT
SDA
SCL
DATA STABLE
DATA
CHANGE
Figure 1. Data Validity
SDA
SCL
START
BIT
STOP
BIT
Figure 2. Definition of Start and Stop
SCL FROM MASTER
1
DATA OUTPUT FROM
TRANSMITTER
DATA OUTPUT FROM
RECEIVER
8
9
START
ACKNOWLEDGE
Figure 3. Acknowledge Response from Receiver
* All specs and applications shown above subject to change without prior notice.
1F-5 NO.66 SEC.2 NAN-KAN RD ., LUCHU , TAOYUAN, TAIWAN
Email: server@ceramate.com.tw
Tel:886-3-3214525
Http: www.ceramate.com.tw
Page 8 of 12
Rev 1.0 Dec. 26, 2001
Fax:886-3-3521052