LP2950 / LP2951
CORPORATION
ELECTRICAL CHARACTERISTICS (continued)
LP2951
LP2950AC / LP2951AC LP2950C / LP2951C
CONDITIONS
PARAMETER
UNITS
(Note 2)
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP MAX
ERROR COMPARATOR
Output Leakage Current
Output Low Voltage
Upper Threshold Voltage
Lower Threshold Voltage
Hysteresis
0.01
150
60
1
0.01
150
60
1
0.01
150
60
1
µA
mV
mV
mV
mV
VOH = 30V
250
250
250
VIN = 4.5V, IOL = 400µA
(Note 7)
40
40
40
75
95
75
95
75
95
(Note 7)
15
15
15
(Note 7)
SHUTDOWN INPUT
1.3
0.6
1.3
0.7
1.3
0.7
V
V
Low (Regulator ON)
High (Regulator OFF)
Input Logic Voltage
2
2
2
Shutdown Pin
Input Current
30
675
50
800
30
675
50
800
30
675
50
800
µA
µA
V
V
S = 2.4V
S = 30V
Regulator Output Current
in Shutdown
3
10
3
10
3
10
µA
(Note 9)
Note 1: Output or reference voltage temperature coefficients defined as the worst case voltage change divided by the total temperature range.
Note 2: Unless otherwise specified all limits guaranteed for TJ = 25oC, VIN = 6V, IL=100µA and CL = 1µF. Additional conditions for the 8-pin
versions are feedback tied to 5V tap and output tied to output Sense (VOUT = 5V) and VSHUTDOWN ≤ 0.8V.
Note 3: Regulation is measured at constant junction temperature, using pulse testing with a low duty cycle. Changes in output voltage due to
heating effects are covered under the specification for thermal regulation.
Note 4: Line regulation for the LP2951 is tested at 150oC for IL = 1mA. For IL = 100µA and TJ = 125oC, line regulation is guaranteed by design to
0.2%. See typical performance characteristics for line regulation versus temperature and load current.
Note 5: Dropout voltage is defined as the input to output differential at which the output voltage drops 100mV below its nominal value measured
at 1V differential at very low values of programmed output voltage, the minimum input supply voltage of 2V (2.3V over temperature) must be
taken input account.
Note 6: VREF ≤ VOUT ≤ (VIN - 1V), 2.3 ≤ VIN ≤ 30V, 100µA ≤ IL ≤ 100mA, TJ ≤ TJMAX
Note 7: Comparator thresholds are expressed in terms of a voltage differential at the feedback terminal below the nominal reference voltage
measured at 6V input. To express these thresholds in terms of output voltage change, multiply by the error amplifier gain = VOUT/VREF
.
=
(R1+R2)/R2. For example, at a programmed output voltage of 5V, the error output is guaranteed to go low when the output drops by 95mV x
5V/1.235 = 384mV. Thresholds remain constant as a percent of VOUT as VOUT is varied, with the dropout warning occurring at typically 5% below
nominal, 7.5% guaranteed.
Note 8: VSHUTDOWN ≥ 2V, VIN ≤ 30V, VOUT = 0, Feedback pin tied to 5V Tap.
Note 9: All typical values are not guaranteed.
BLOCK DIAGRAM
UNREGULATED DC
5V @ 100mA
MAX
7
8
1
+
FEEDBACK
INPUT
OUTPUT
2
SENSE
+
–
180kΩ
60kΩ
6
ERROR
AMPLIFIER
3
330kΩ
5V TAP
FROM
CMOS
OR TTL
SHUTDOWN
+
5
1µF
+
+
–
60mV
ERROR
ERROR DETECTION
COMPARATOR
TO CMOS OR
TTL
+
1.23V
REFERENCE
LP2950 AND LP2951 BLOCK DIAGRAM
4
GROUND
1D-21
CALOGIC CORPORATION, 237 Whitney Place, Fremont, California 94539, Telephone: 510-656-2900, FAX: 510-651-3025
CALOGIC [ CALOGIC, LLC ]
