PRELIMINARY
CM3121
Application Information (cont’d)
DDR-II Application
For DDR-II applications, it is recommended that a
lower input voltage than 3.3V be applied to reduce
overall power dissipation. The input voltage can be as
low as 2.1V worst case, so an input voltage of 2.4V
10% would be the best input voltage for the least
The maximum current I
II application is 1.5V, and the maximum for I is 0.3V.
This should be satisfactory for most DDR- II applica-
tions because the DDR- II memories do not require a
for the CM3121 in a DDR-
DDQ
TT
V
, so the only current needed is for either a refer-
TT
power dissipation. Also to obtain a V
voltage of
DDQ
ence voltage or a controller input.
1.8V, a resistor divider comprising R1 = 56K and R2 =
130K would result in an output voltage of 1.79V for
.
V
, and a V of 0.895V.
DDQ
TT
* VDDQ = 1.25V x
R1 + R2
----------------------
R2
VCC
2.15V to 3.6V
VDDQ
REGULATOR
VDDQ
CCC
VREF
VDDQ=1.8V*
R1
SENSE
VDDQ
CDDQ
EN_DDR
Enable DDR
Memory #
DDR
MEMORY
R2
VTT
REGULATOR
R
VTT=0.90V
VTT
R
SENSE VTT
CTT
CPU
CORE
+ I/O
CURRENT LIMIT
OVERTEMP
LOW INPUT
FAULT
GND
Figure 5. Minimal CM3132 DDR-II power solution.
© 2004 California Micro Devices Corp. All rights reserved.
10 430 N. McCarthy Blvd., Milpitas, CA 95035-5112
●
Tel: 408.263.3214
●
Fax: 408.263.7846
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www.calmicro.com
11/12/04
CALMIRCO [ CALIFORNIA MICRO DEVICES CORP ]
