PRELIMINARY
CM3015
PACKAGE / PINOUT DIAGRAM
(Note 1)
TOP VIEW
V
IN
GND
EN
1
5
TOP VIEW
V
OUT
V
IN
GND
BYP EN
1
6
TOP VIEW
V
OUT
SENSE
BYP
EN
VIN
VOUT
BYP
1
8
GND
GND
GND
EN
VIN
VOUT
TOP VIEW
1
8
GND
GND
GND
GND
CCnn
2
4
CM30
1500
CM30
15nn
2
CC00
2
2
5
2
3
4
7
6
5
2
3
4
7
6
5
3
3
4
GND VSENSE
5-PIN SOT23
CM3015-12ST,-15ST,
-18ST,-25ST,-30ST,-33ST
6-PIN SOT23
CM3015-00ST
8-PIN MSOP
CM3015-12MA,-15MA,
-18MA,-25MA,-30MA,-33MA
8-PIN MSOP
CM3015-00MA
Notes:
1) These drawings are not to scale.
2) See Ordering Information section for part marking details.
PIN DESCRIPTIONS
SOT23-5
PIN(S)
1
SOT23-6
PIN(S)
1
MSOP-8
PIN(S)
2
NAME
V
IN
DESCRIPTION
V
IN
is the input power source for the regulator. If this input is within a few
inches of the main supply filter, a capacitor may not be necessary. Other-
wise, an input filter capacitor of about 1-10µF will ensure adequate filter-
ing.
The negative reference for all voltages.
Enable input. When this input is taken low (< 0.4V), the regulator is dis-
abled. In this state, the supply current will drop to near zero.
Reference Bypass Pin. Connect to an external capacitor for noise reduc-
tion. A 10nF-100nF size ceramic capacitor is recommended.
This pin sets V
OUT
with an external divider: V
OUT
= VSENSE(1+ R
1
/R
2
).
R1 is the upper resistor, like the internal divider shown on the block dia-
gram on page 1.
V
OUT
is the output voltage used to power the load. An output capacitor
may not be required for stability, but its use can improve transient
response, noise performance and power supply ripple rejection for fre-
quencies over ~100kHz (see note 1).
2
3
4
2
3
4
5
5-8
1
4
4
GND
EN
BYP
VSENSE
−
5
6
3
V
OUT
Note 1: Tantalum, electrolytic or low cost ceramic capacitors may be used.
©
2004 California Micro Devices Corp. All rights reserved.
2
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
●
Tel: 408.263.3214
●
Fax: 408.263.7846
●
www.calmicro.com
09/14/04
CALMIRCO [ CALIFORNIA MICRO DEVICES CORP ]
