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CM2400-05HA 参数 Datasheet PDF下载

CM2400-05HA图片预览
型号: CM2400-05HA
PDF下载: 下载PDF文件 查看货源
内容描述: 通用串行总线收发器,电平转换器 [Universal Serial Bus Transceiver with Level Translator]
分类和应用: 总线收发器线路驱动器或接收器转换器电平转换器驱动程序和接口接口集成电路
文件页数/大小: 13 页 / 183 K
品牌: CALMIRCO [ CALIFORNIA MICRO DEVICES CORP ]
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PRELIMINARY  
CM2400-05  
Specifications (cont’d)  
ELECTRICAL OPERATING CHARACTERISTICS (CONT’D)  
Static Operating Characteristics (cont’d)  
Analog I/O Pins (VBUS = 4.1V to 5.5V; VCC = 1.65V to 3.6V)  
SYMBOL PARAMETER  
CONDITIONS  
MIN  
TYP MAX UNITS  
VDI  
VCM  
VIL  
Differential receiver input sensi-  
tivity  
0.2  
V
| VI(D+) - VI(D-) |  
Differential receiver  
common mode voltage  
0.8  
2.5  
0.8  
V
V
V
V
Single-ended receiver  
logic LOW input voltage  
OE = logic "1"  
OE = logic "1"  
OE = logic "1"  
VIH  
Single-ended receiver  
logic HIGH input voltage  
2.0  
0.4  
VHYS  
Single-ended receiver  
Hysteresis voltage  
0.7  
VOL  
VOH  
ILZ  
Logic LOW output voltage  
Logic HIGH output voltage  
OFF-state leakage current  
Transceiver Capacitance  
RL = 1.5ktied to +3.6V  
RL = 15ktied to GND  
0.3  
3.6  
1
V
V
2.8  
µA  
pF  
CIN  
Pin to GND  
10  
30  
RSW  
Internal switch resistance at  
VPU  
ZDRV  
Driver output impedance  
(includes 33 ohm 1% resistor)  
Measured with steady-state drive; See Note  
3
33  
39  
44  
Dynamic Operating Characteristics:  
Analog I/O Pins (VBUS = 4.1 to 5.5V; VCC = 1.65 to 3.6V)  
Driver Characteristics & Timings (Full-speed mode only)  
SYMBOL PARAMETER  
CONDITIONS  
MIN  
TYP MAX UNITS  
tFR  
tFF  
Rise time  
Fall time  
CL = 50 to 125pF, measured 10% to 90%  
(VOH-VOL); See Figure 6  
4
20  
ns  
CL = 50 to 125pF, measured 10% to 90%  
(VOH-VOL); See Figure 6  
4
20  
ns  
FRFM  
VCRS  
Differential rise / fall time match- Excluding the first transition from idle state  
ing (tFR/tFF  
90  
110  
2.0  
%
V
)
Output signal crossover  
voltage  
Excluding the first transition from idle state;  
See Figure 9  
1.3  
tPLH(DRV) Driver propagation delay (VO/  
LOW-to-HIGH transition; See Figure 9  
HIGH-to-LOW transition; See Figure 9  
18  
18  
ns  
ns  
VPO D+/D-, FSEO/VMO ➔  
tPHL(DRV)  
D+/D-  
tPHZ  
tPLZ  
tPZH  
tPZL  
Driver disable delay  
(OE D+/D-)  
HIGH-to-OFF; See Figure 7  
LOW-to-OFF; See Figure 7  
OFF-to-HIGH; See Figure 7  
OFF-to-LOW; See Figure 7  
18  
18  
15  
15  
ns  
ns  
ns  
ns  
Driver enable delay  
(OE D+/D-)  
Note 3: Rev 2.0 states ZDRV must be between 28and 44, when the driver is not high speed capable.  
© 2004 California Micro Devices Corp. All rights reserved.  
06/30/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112  
Tel: 408.263.3214  
Fax: 408.263.7846  
www.calmicro.com  
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