PRELIMINARY
CM20LT
DYNAMIC PULLUPS
(CONT’D)
Figure 2. Dynamic DDC Pullups
(Discrete - Left. CM2030 - Right.)
Figure 2 demonstrates the "worst case" operation of
the dynamic CM2030 DDC level shifting circuitry (right)
against a discrete NFET common-gate level shifter cir-
cuit with a typical 1.5k pullup (left.) Both are shown
driving an off-spec, but unfortunately readily available
31m HDMI cable which exceeds the 700pF HDMI
specification.
When the standard I/OD cell releases the NFET dis-
crete shifter, the risetime is limited by the pullup and
the parasitics of the cable, source and sink. For long
cables, this can extend the risetime and reduce the
margin for reading a valid "high" level on the data line.
In this case, an HDMI source may not be able to read
uncorrupted data and will not be able to initiate a link.
With the CM2030’s dynamic pullups, when the ASIC
driver releases its DDC line and the "OUT" line
reaches at least 0.3*VDD (of VIN_2), then the "OUT"
active pullups are enabled and the CM2030 takes over
driving the cable until the "OUT" voltage approaches
the VIN_2 rail.
The internal pass element and the dynamic pullups
also work together to damp reflections on the longer
cables and keep them from glitching the local ASIC.
communicate at the specified I
2
C levels. With an I
2
C
VIL of approximately 1.5V (0.3*VDD), and typical
CMOS/TTL VIL input levels of 0.8V or less, an incom-
patibility can arise where valid HDMI specified logic
lows on the cable are not recognized within the ASIC.
The CM2030 incorporates automatic CMOS/I
2
C logic
low
translation
on
the
DDC_CLK_IN
and
DDC_DAT_IN lines.
As highlighted in Figure 2 above, when the cable-side
level ("OUT" side) of each DDC line is below 0.3*VDD,
the ASIC-side ("IN" side) of the DDC line is forced to a
CMOS low-level while the "OUT" side is allowed to
slew normally.
The CM2030 dynamic pullups, low level shifters, and
pass element shifters are all matched to allow trans-
parent operation. This bi-directional circuit can be used
as easily as any discrete common-gate NFET level
shifter, but with the added functionality.
Multiport DDC Multiplexing
Additionally, by switching VIN_1, the DDC/HPD blocks
can be independently disabled by engaging their inher-
ent "backdrive" protection. This allows N:1 multiplexing
of the low-speed HDMI signals without any additional
FET switches.
I
2
C/CMOS LEVEL SHIFTING
Using a standard CMOS input buffer for the DDC inter-
face on the local HDMI ASIC can create a failure to
© 2006 California Micro Devices Corp. All rights reserved.
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Tel: 408.263.3214
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Fax: 408.263.7846
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www.calmicro.com
4/18/2006
CALMIRCO [ CALIFORNIA MICRO DEVICES CORP ]
