Issue X-2
CM1234
Application Information
CM1234 Application and Guidelines
As a general rule, the CM1234 ESD protection array should be located as close as possible to the point of entry of
expected electrostatic discharges with minimum PCB trace lengths to the ground planes and between the signal
input and the ESD device to minimize stray series inductance.
V
CC
CM1234
Path of ESD
current pulse
(I
ESD
)
Channel
Output
Channel
Input
Circuitry Under
Protection
Line Being
Protected
V
CL
V
N
Ground Rail
Figure 7. Application of Positive ESD Pulse Between Input Channel and Ground
Figure 8. Typical PCB Layout
Additional Information
See also California Micro Devices Application Note AP209, “Design Considerations for ESD Protection,” in the
Applications section at www.calmicro.com.
© 2008 California Micro Devices Corp. All rights reserved.
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Fax: 408.263.7846
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4/24/2008