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TMC3033KRC50 参数 Datasheet PDF下载

TMC3033KRC50图片预览
型号: TMC3033KRC50
PDF下载: 下载PDF文件 查看货源
内容描述: 三路视频D / A转换器10位, 80 Msps的 [Triple Video D/A Converter 10 bit, 80 Msps]
分类和应用: 转换器
文件页数/大小: 12 页 / 216 K
品牌: CADEKA [ CADEKA MICROCIRCUITS LLC. ]
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TMC3033
PRODUCT SPECIFICATION
Functional Description
The TMC3033 is a low-cost triple 10-bit CMOS D/A
converter designed to directly drive computer CRT displays
and video transmission lines at pixel rates of up to 80 Msps.
It comprises three identical 10-bit D/A converters with
registered data inputs, common clock, and internal voltage
reference. An independent current source allows sync to be
added to the green D/A converter output.
D/A Outputs
Each D/A output is a current source. To obtain a voltage out-
put a resistor must be connected to ground. Output voltage of
the D/A converters depends upon this resistor, the reference
voltage, and the value of the gain-setting resistor connected
between R
REF
and GND.
Normally, a source termination resistor of 75 Ohms is con-
nected between the D/A current output pin and GND near
the D/A converter. A 75 Ohm coaxial cable may then be con-
nected with another 75 Ohm termination resistor at the far
end of the cable. This “double termination” presents the D/A
converter with a net resistive load of 37.5 Ohms.
The TMC3033 may also be operated with a single 75 Ohm
terminating resistor. To lower the output voltage swing to the
desired range, the value of the resistor on R
REF
should be
increased.
Digital Inputs
All digital inputs are TTL-compatible. Data are registered on
the rising edge of the CLK signal. The analog output
changes t
DO
after the rising edge of CLK. There is one stage
of pipeline delay on the chip. The guaranteed clock rates of
the TMC3033 are 80, 50, and 30 MHz.
SYNC and BLANK
SYNC and BLANK inputs control the output level
(Figure 1 and Table 1) of the D/A converters during CRT
retrace intervals. BLANK forces the D/A outputs to the
blanking level while SYNC turns off a separate current
source which is connected to the green D/A converter. This
connection adds a 40 IRE sync pulse to the D/A output and
brings that D/A output to 0.0 Volts during the sync tip.
SYNC and BLANK are registered on the rising edge of
CLK.
BLANK gates the D/A inputs and sets the pedestal voltage.
If BLANK = HIGH, the D/A inputs are added to a pedestal
which offsets the current output. If BLANK = LOW, data
inputs and the pedestal are disabled.
Voltage Reference
The TMC3033 has an internal bandgap voltage reference
of +1.235 Volts. An external voltage reference may be
connected to the V
REF
pin, overriding the internal voltage
reference. All three D/A converters are driven from the same
reference.
A 0.1
µ
F capacitor must be connected between the COMP
pin and V
DD
to stabilize internal bias circuitry and ensure
low-noise operation.
Power and Ground
The TMC3033 D/A converter requires a single +3.3 Volt
power supply. The analog (V
DD
) power supply voltage
should be decoupled to GND to reduce power supply
induced noise. 0.1
µ
F decoupling capacitors should be placed
as close as possible to the power pins.
The high slew-rate of digital data makes capacitive coupling
to the outputs of any D/A converter a potential problem.
Since the digital signals contain high-frequency components
of the CLK signal, as well as the video output signal, the
resulting data feedthrough often looks like harmonic distor-
tion or reduced signal-to-noise performance. All ground pins
should be connected to a common solid ground plane for
best performance.
data: 660 mV max.
pedestal: 54 mV
sync: 286 mV
65-3003-02
Figure 1. Nominal Output Levels
2