TMC2242A/TMC2242B
PRODUCT SPECIFICATION
Timing Diagrams
(continued)
t
ENA
OE
Three-State
Outputs
0.5V
High Impedance
t
DIS
0.5V
2.0V
0.8V
65-2242A-11
Figure 9. Threshold Levels for Three State Measurements
Applications Discussion
The TMC2242A and TMC2242B are well-suited for filtering
digitized composite NTSC or PAL video. In Figure 10, the
TMC1175A 8-bit video A/D converter outputs, D
7-0
, are
connected to the TMC2242B inputs, SI
11-4
, respectively
(grounding SI
3-0
). The RND
2-0
controls are set to 111 for a
9-bit rounded decimated output on SO
15-7
.
In Figure 11, the TMC2242B drives a fast D/A converter to
reconstruct analog composite video. The TMC3003 10-bit
digital-to-analog converter inputs, D
9-0
are connected to the
TMC2242B outputs SO
15-6
, respectively. The TMC2242B
RND
2-0
controls are set to 110 for rounded 10-bit interpola-
tion operation.
TTL Clock
27.000 MHz (D1)
28.636 MHz (NTSC D2)
D7
7
SI11
2 uH
Composite
Video
75 Ohm
300 pF
2 uH
510 pF
300 pF
VIN
75 Ohm
TMC1175A
8-bit A/D
AGND
TMC2242B
SO15
SO14-7
MSB
65-2242A-12
SI10-4
DEC=0
TCO=INT=1
27.000 MHz (D1)
28.636 MHz (NTSC D2)
D6-0
8
9
13.500 MHz (D1)
14.318 MHz (NTSC D2)
Figure 10. Decimating Oversampled Video With a Low Cost 8-bit A/D
TTL Clock
27.000 MHz (D1)
28.636 MHz (NTSC D2)
MSB
SI11
12
11 LSB
TMC2242B
SO15
SO14-6
9
D9
TMC3003
10-bit D/A
D8-0
2 uH
IOUT
75 Ohm
510 pF
300 pF
2 uH
300 pF
Composite
Video
75 Ohm
SI10-0
TCO=1 INT=DEC=0
13.500 MHz (D1)
14.318 MHz (NTSC D2)
27.000 MHz (D1)
28.636 MHz (NTSC D2)
AGND
65-2242A-13
Note:
Data buses are unsigned binarys; TMC2242 input is two’s complement.
Figure 11. Interpolating Digital Video Signals before Reconstruction
11
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