PRODUCT SPECIFICATION
TMC2250A
Switching Characteristics
Parameter
Conditions
CLOAD = 25 pF
CLOAD = 25 pF
Min
Typ
Max
Units
ns
tDO
tHO
Output Delay Time
Output Hold Time
15
3
ns
Application Notes
Performing Large-Kernel Pixel Interpolation
The Cascade Input and Output Ports of the TMC2250A allow the user to stack multiple devices to perform larger interpolation
kernels with no decrease in pixel throughput. Figure 12 illustrates a basic application utilizing Mode 11 to realize a 4 x 4-pixel
kernel, also called Cubic Convolution. This example utilizes the TMC2011A Variable-Length Shift Register to compensate for
the internal latency of each TMC2250A. Alternatively, some applications may utilize RAM, FIFO's, or other methods to store
multiple-line pixel data. In these cases the user may compensate for latency by simply offsetting the access sequencing of the
storage devices.
A
B
A
12
12
4 X 2 TMC2250A
B
CASOUT
16
CASIN
C
D
A
12
12
4 X 2 TMC2250A
B
CASOUT
16
3 X TMC2111A
OUTPUT
Figure 12. Figure 12. Performing Cubic Convolution with Two TMC2250A's
Related Products
• TMC2301 Image Resampling Sequencer
• TMC2302A Image Manipulation Sequencer
• TMC2249A Video Mixer
• TMC2242B Half-Band Filter
18
REV. 1.0.2 10/25/00
CADEKA [ CADEKA MICROCIRCUITS LLC. ]
