TMC22071A
PRODUCT SPECIFICATION
Horizontal Timing
Horizontal line rate is selectable, and is determined by the
FORMAT control bits (12.27 Mpps for NTSC, 13.5 Mpps
for NTSC and PAL). Figure 5 illustrates the horizontal
blanking interval. Figure 6 completes the definition of timing
parameters with vertical blanking interval detail.
2.35
µsec
PAL
2.3
µsec
NTSC
Equalizing Pulse
Video In
H
0.5H
4.7
µsec
Serration
GVSYNC
tVD
GHSYNC
(Odd Field)
GHSYNC
(Even Field)
tDH
65-22071-08
Video In
Burst
Figure 6. Vertical Sync timing
Programming the TMC22071A
tDH
GHSYNC
65-22071-07
Figure 5. Horizontal Sync Timing
Upon power-up after bringing RESET LOW, the
TMC22071A Control Register is set to default values as
shown in the top entry of Table 3. These default values do
not necessarily render the TMC22071A operational in any
specific application. Before the TMC22071A is expected to
acquire input video, its Control Register must be loaded with
data that is specific to its use.
Table 2.TMC22071A Timing Options
Standard
NTSC
NTSC-601
PAL-601
Field
Rate (Hz)
59.94
59.94
50.00
Line
Rate (kHz)
15.734264
15.734264
15.625
Pixel
Rate (Mpps)
12.2727+
13.50
13.50
PXCK
Frequency (MHz)
24.54+
27.0
27.0
Plxels
Per Line
780
858
864
Table 3. Control Register Example Data
Control Register Data (Bit 56 …… Bit 0)
Standard
DEFAULT
NTSC
NTSC-601
PAL-601
46
0000
0010
0010
0010
42
0110
0110
0110
1110
38
0000
0000
0000
0000
34
1001
1001
1001
1001
30
0000
1000
1000
1000
26
0010
0010
0010
0010
22
0000
0000
0000
0000
18
0000
0000
0000
0000
14
0000
0000
0000
0000
10
0000
00xx
00xx
00xx
6
0000
0000
0000
0001
2
001
000
010
xx0
10
CADEKA [ CADEKA MICROCIRCUITS LLC. ]
