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TMC22053AKHC 参数 Datasheet PDF下载

TMC22053AKHC图片预览
型号: TMC22053AKHC
PDF下载: 下载PDF文件 查看货源
内容描述: 多标准数字视频解码器三线自适应梳状解码器系列, 8和10位 [Multistandard Digital Video Decoder Three-Line Adaptive Comb Decoder Family, 8 & 10 bit]
分类和应用: 解码器商用集成电路
文件页数/大小: 84 页 / 515 K
品牌: CADEKA [ CADEKA MICROCIRCUITS LLC. ]
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PRODUCT SPECIFICATION  
TMC22x5yA  
Output Processor  
Mixed Sync  
+
X
SGx[9:0]  
Adaptive Luma  
Notch Filter  
Y Data  
+
X
G/Y Data  
YOFF[8:0]  
YGx[9:0]  
YSEL ANEN  
ANT[1:0]  
VIDEOB  
PED[7:0]  
Output  
Formatter  
Clamp  
Circuit  
LPF  
256  
240  
X
B/Cb Data  
R/Cr Data  
CLMP[1:0]  
VCLPEN  
Fixed (B-Y)  
Gain Stage  
U Data  
V Data  
X
UGx[10:0]  
X
Fixed (R-Y)  
Gain Stage  
X
65-22x5y-65  
VGx[10:0]  
Figure 24. Output Processor Block Diagram  
clamp pulse can be used to control where an analog clamp  
circuit grabs the analog reference to establish the correct  
voltage level into the A/D. Usually the clamp pulse is gener-  
ated on the back porch or duing the sync tip of a video line.  
Clamp Circuit  
A clamp pulse generated by the Burst Gate signal is used to  
grab either a sample of the low-pass-filtered luma during the  
video back porch, the signal on VIDEOB, or one of two  
internally generated levels. The selection is made by the  
CLMP[1:0] register bits.  
Adaptive Notch Filter  
The PAL line-locked comb decoder can never provide  
perfect subcarrier cancellation due to the 25Hz offset in the  
subcarrier frequency. This 25Hz offset causes residual and  
phase modified subcarrier to be left on the luminance signal  
which can produce a visible dot crawl on flat areas of color.  
However, for all comb filter structures, the quality of the  
comb depends on the quality of the sampling clock, as line to  
line clock jitter will also cause small phase changes between  
the inputs to the comb filter. It is therefore possible that  
NTSC comb decoders may also require some coring of the  
luma output. To meet the wide range of sample frequencies  
that the decoder must deal with two separate coring filters  
are selectable.  
Table 11. Blanking Level Selection  
CLMP[1:0]  
Blanking Selection  
Internal 240 level  
00  
01  
10  
11  
Internal 256 level  
External VIDEOB Input  
Internal LPF Output  
The blanking level is subtracted from the decoded luma.  
If the sign is negative, the result is assumed to be mixed sync  
and is passed through a delay and into the sync gain stage  
within the output matrix. If the sign is positive, the result is  
assumed to be pure luma (blanking to peak white) and is fed  
to the pedestal removal circuit.  
The luma signal from the pedestal stripper is compared  
against the preceding pixel to detect the magnitude change  
between pixels. This magnitude difference will be almost  
zero for flat areas of picture, and large for high frequency  
changes in the picture. The magnitude difference is com-  
pared to one of four programmable thresholds. The program-  
Pedestal Removal  
The 8 bit programmable pedestal is subtracted from the pure  
luma signal. The negative super black signals are clipped to  
zero when register 0Ah bit 4 is set LOW, or the super black  
signals are passed through the luma scalar when register 0Ah  
bit 4 is HIGH.  
mable threshold is selected by the ANT register bits as  
1-0  
shown in Table 12.  
Table 12. Adaptive Notch Threshold Control  
ANT  
1-0  
Magnitude difference  
less than 16  
Clamp Generator  
00  
01  
10  
11  
The TMC22x5yA has the unique option to output a negative  
going clamp pulse that is 0.5 µsec wide. This pulse can be  
output on the AVOUT pin by placing a HIGH on register 24  
bit 7. The pulse’s position relative to HSYNC can be varied  
by register 25. This value is the number of PCK clock cycles  
after an HSYNC that the pulse will be output to the pin. The  
less than 12  
less than 8  
less than 4  
REV. 1.0.0 2/4/03  
55  
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