TMC1175A
PRODUCT SPECIFICATION
4. Decoupling capacitors should be applied liberally to
6. CONV should be handled carefully. Jitter and noise on
this clock may degrade performance. Terminate the
clock line at the CONV input, if required, to eliminate
overshoot and ringing.
V
DD
pins. Remember that not all power supply pins are
created equal. They supply different circuits on the inte-
grated circuit, each of which generate varying amounts
and types of noise. For best results, use 0.1µF ceramic
capacitors. Lead lengths should be minimized. Ceramic
chip capacitors are the best choice.
Evaluation Board
An evaluation board is available that implements good inter-
face practices and provide a convenient testbed for develop-
ing system applications and circuit variations. An on-board
D/A converter is provided to reconstruct the digitized signal
and to evaluate converter performance.
5. If the digital power supply has a dedicated power plane
layer, it should not be placed under the TMC1175A, the
voltage reference, or the analog inputs. Capacitive cou-
pling of digital power supply noise from this layer to the
TMC1175A and its related analog circuitry can have an
adverse effect on performance.
Contact your sales representative for information.
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REV. 1.3.3 2/28/02
CADEKA [ CADEKA MICROCIRCUITS LLC. ]
