PRODUCT SPECIFICATION
TMC1175A
Regulated +5V
0.1µF
LM385
0.1µF
1kΩ
+5V
Gain Adjust
2kΩ
0.1mF
+
-
1kΩ
1kΩ
Video
Input
75Ω
+
-
455Ω
455Ω
Wideband
Op-amp
0.1µF
RB
VR-
V IN
A GND
+5V
20Ω
2V
V DDA
VR+
RT
TMC1175A
D 7-0
OE
CONV
D GND
V DDD
+5V
0.1µF
27056A
Figure 12. Typical Interface Circuit-High Performance
Grounding
The TMC1175A has separate analog and digital
circuits. To keep digital system noise from the A/D
converter, it is recommended that power supply voltages
(V
DDD
and V
DDA
) originate from separate sources with
V
DDA
regulated, and that ground connections (D
GND
and
A
GND
) be made to the analog ground plane. Power supply
pins should be individually decoupled at the pin. The digital
circuitry that gets its input from the TMC1175A should be
referred to the system digital ground plane.
0.1µF
+5V
0.1µF
Offset
Adjust
V DDA
+5V
2.2kΩ
2kΩ
0.1µF
VR+
RT
V DDD
TMC1175A
RB
VR-
D 7-0
OE
V IN
A GND
CONV
D GND
0.1µF
Video
Input
560Ω
0.1µF
Printed Circuit Board Layout
Designing with high performance mixed-signal circuits
demands printed circuits with ground planes. Wire-wrap is
not an option, even for breadboarding. Overall system per-
formance is strongly influenced by the board layout. Capac-
itive coupling from digital to analog circuits may result in
poor A/D conversion. Consider the following suggestions
when doing the layout:
1.
Keep the critical analog traces (V
IN
, R
T
, R
B
, VR+,
VR-) as short as possible and as far as possible from all
digital signals. The TMC1175A should be located near
the board edge, close to the analog input connectors.
The power plane for the TMC1175A should be sepa-
rate from that which supplies the rest of the digital cir-
cuitry. A single power plane should be used for all of
the V
DD
pins. If the power supply for the TMC1175A
is the same as that of the system's digital circuitry,
power to the TMC1175A should be decoupled with
ferrite beads and 0.1µF capacitors to reduce noise.
The ground plane should be solid, not cross-hatched.
Connections to the ground plane should have very
short leads.
10µF
75Ω
24458A
Figure 13. Typical Interface Circuit – Low Cost
0.1µF
+5V
0.1µF
V DDA
VR+
RT
LM385
1kΩ
RF
Input
10µF
0.1µF
V DDD
TMC1175A
RB
VR-
V IN
D 7-0
OE
CONV
D GND
24457A
2.
56Ω
1kΩ
A GND
3.
Figure 14. Typical Interface Circuit – Stabilized Reference
REV. 1.3.3 2/28/02
13
CADEKA [ CADEKA MICROCIRCUITS LLC. ]
