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SPT7862SIT 参数 Datasheet PDF下载

SPT7862SIT图片预览
型号: SPT7862SIT
PDF下载: 下载PDF文件 查看货源
内容描述: 10位, 40 MSPS ,双通道A / D转换器 [10-BIT, 40 MSPS, DUAL-CHANNEL A/D CONVERTER]
分类和应用: 转换器
文件页数/大小: 10 页 / 188 K
品牌: CADEKA [ CADEKA MICROCIRCUITS LLC. ]
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SPT7862
10-BIT, 40 MSPS, DUAL-CHANNEL A/D CONVERTER
FEATURES
• Dual-channel, 10-Bit, 40 MSPS analog-to-digital
converter
• Low power dissipation: 320 mW (typical)
• Internal track-and-hold
• Single +5 volt supply
• Tri-state, TTL/CMOS-compatible outputs
• Selectable +3 or +5 V logic I/O
• High ESD protection of 3,500 volts minimum
APPLICATIONS
Video set-top boxes
Cellular base stations
QPSK/QAM RF demodulation
S-video digitizers
Composite video digitizers
Portable and handheld instrumentation
Medical ultrasound
Cable modems
Video frame grabbers
GENERAL DESCRIPTION
The SPT7862 contains two separate 10-bit CMOS analog-
to-digital converters that have sampling rates of up to 40
MSPS. Each device has its own separate clock and refer-
ence inputs so that they can be used independently in
multichannel applications or can be driven from the same
inputs for demanding quadrature demodulation and S-video
applications. On-chip track-and-hold and advanced propri-
etary circuit design in a CMOS process technology provide
very good dynamic performance.
The SPT7862 operates from a single +5 V supply. Digital
data outputs are user selectable at +3 or +5 V. Output data
format is straight binary.
The SPT7862 is available in a 64-lead TQFP package
(10 x 10 mm) over the industrial temperature range of
–40
°C
to +85
°C.
BLOCK DIAGRAM
AV
DD
AGND
DV
DD
DGND
OV
DDA
(+3.3/5.0 V)
V
INA
V
INRA
V
RHFA
V
RHSA
V
RLFA
V
RLSA
CLK A
ADC
Output
Buffers
DA9–0
OGND
A
Reference
Ladder
DAV
A
EN
Timing
Generation
OV
DDB
(+3.3/5.0 V)
Output
Buffers
V
INB
V
INRB
V
RHFB
V
RHSB
V
RLFB
V
RLSB
CLK B
ADC
DB9–0
OGND
B
Reference
Ladder
DAV
B
Timing
Generation