ABSOLUTE MAXIMUM RATINGS (Beyond which damage may occur)
1
25 °C
Supply Voltages
AV
DD
...................................................................... +6 V
DV
DD
..................................................................... +6 V
Input Voltages
Analog Input .............................. –0.5 V to AV
DD
+0.5 V
V
REF
.............................................................. 0 to AV
DD
CLK Input ............................................................... V
DD
AV
DD
– DV
DD
.................................................. ±100 mV
AGND – DGND .............................................. ±100 mV
Output
Digital Outputs ................................................... 10 mA
Temperature
Operating Temperature ............................ –40 to 85 °C
Junction Temperature ........................................ 175 °C
Lead Temperature, (soldering 10 seconds) ....... 300 °C
Storage Temperature ............................ –65 to +150 °C
Note:
1. Operation at any Absolute Maximum Rating is not implied. See
Electrical Specifications for proper nominal applied conditions
in typical applications.
ELECTRICAL SPECIFICATIONS
T
A
=T
MIN
to T
MAX
, AV
DD
=DV
DD
=+5.0 V, V
IN
=0 to 4 V, ƒ
CLK
=25 MSPS, V
RHS
=4.0 V, V
RLS
=0.0 V, unless otherwise specified.
PARAMETERS
Resolution
DC Accuracy
Integral Linearity Error (ILE)
Differential Linearity Error (DLE)
No Missing Codes
Analog Input
Input Voltage Range
Input Resistance
Input Capacitance
Input Bandwidth
Offset
Gain Error
Reference Input
Resistance
Bandwidth
Voltage Range
V
RLS
V
RHS
V
RHS
– V
RLS
∆(V
RHF
– V
RHS
)
∆(V
RLS
– V
RLF
)
Reference Settling Time
V
RHS
V
RLS
Conversion Characteristics
Maximum Conversion Rate
Minimum Conversion Rate
Pipeline Delay (Latency)
Aperture Delay Time
Aperture Jitter Time
Dynamic Performance
Effective Number of Bits (ENOB)
ƒ
IN
= 3.58 MHz
ƒ
IN
= 10.3 MHz
Signal-to-Noise Ratio (SNR)
(without Harmonics)
ƒ
IN
= 3.58 MHz
ƒ
IN
= 10.3 MHz
TEST
CONDITIONS
TEST
LEVEL
MIN
10
SPT7855
TYP
MAX
UNITS
Bits
VI
VI
VI
VI
IV
V
V
V
V
VI
V
IV
IV
V
V
V
V
V
VI
IV
IV
V
V
25
2
V
RLS
50
±1.0
±0.5
Guaranteed
V
RHS
5.0
100
±2.0
±2.0
300
100
0
3.0
1.0
500
150
–
–
4.0
90
75
15
20
600
2.0
AV
DD
5.0
LSB
LSB
(Small Signal)
V
kΩ
pF
MHz
LSB
LSB
Ω
MHz
V
V
V
mV
mV
Clock Cycles
Clock Cycles
MHz
MHz
Clock Cycles
ns
ps (p-p)
12
8
15
VI
VI
VI
VI
54.0
53.0
8.5
8.3
57
56
Bits
Bits
dB
dB
SPT7855
2
5/25/01
CADEKA [ CADEKA MICROCIRCUITS LLC. ]
