DATA SHEET
SPT7851
Analog Input
The input of the SPT7851 can be configured in various ways
depending on if a single-ended or differential, AC- or DC-
coupled input is desired.
The AC coupled input is most conveniently implemented
using a transformer with a center tapped secondary winding.
The center tap is connected to the V
CM
pin as shown in
Figure 2. To obtain low distortion, it is important that the
selected transformer does not exhibit core saturation at the
full-scale voltage. Proper termination of the input is impor-
tant for input signal purity. A small capacitor across the
inputs attenuates kickback noise from the internal sample
and hold.
Figure 3 illustrates a solution (based on operational amplifiers)
that can be used if a a DC-coupled single-ended input is
desired. The selection criteria of the buffer op-amps is as follows:
• Open loop gain > 75dB
• Gain bandwidth product > 50MHz
• Total Harmonic Distortion
≤
–75dB
• Signal-to-Noise Ratio > 75dB
R3
R3
V
CM
(R3)/2
Input
Voltage
(±0.5V)
R2
R2
–
+
R
–
+
15pF
51Ω
V
IN+
ADC
V
IN-
R
References
The SPT7851 has a differential analog input. The voltages
applied to the VREF+ and VREF– pins determine the input
voltage range and are equal to ±(VREF+ – VREF–). This
voltage range will be symmetrical about the common mode
voltage. Externally generated reference voltages must be
connected to these pins. (See figure 2, Typical Interface Cir-
cuit.) For best performance, these voltages should be sym-
metrical about the midpoint of the supply voltage.
Common Mode Voltage
Reference Circuit
The SPT7851 has an on-board common mode voltage refer-
ence circuit (VCM). It is typically one-half of the supply
voltage and can drive loads of up to 20 µA. This circuit is
commonly used to drive the center tap of the RF transformer
in fully differential applications. For single-ended applica-
tions, this output can be used to provide the level shifting
required for the single-to-differential converter conversion
circuit.
Bias Current Circuits
The bias currents suggested (Bias 1 and Bias 2 in figure 2)
optimize device performance for the stated sample rate of 20
MSPS. To achieve the best dynamic performance when oper-
ating the device at sample rates other than 20 MSPS, the bias
current levels should be adjusted. Table I shows the settings
for Bias 1 and Bias 2 for selected sample rates. The “Bias
Voltage vs Bias Current” graphs on page 4 show the relation-
ship between the bias current and the bias voltage. Please
refer to the application note for more information.
Table I – Sample Rate Settings
51Ω
+
–
R
R
R
51Ω
Sample Rate (MHz)
Bias1 (µA)
30
50
70
90
Bias2 (µA)
3.0
6.0
7.5
9.5
Figure 3: DC-coupled single-ended to differential
conversion (power supplies/bypassing not shown)
1
5
Power Supplies and Grounding
The SPT7851 is operated from a single power supply in the
range of 2.8 to 3.6 volts. Nominal operation is suggested to
be 3.3 volts. All power supply pins should be bypassed as
close to the package as possible. The analog and digital
grounds should be connected together with a ferrite bead as
shown in the typical interface circuit and as close to the ADC
as possible.
10
20
6
REV. 1B October 2003
CADEKA [ CADEKA MICROCIRCUITS LLC. ]
