ELECTRICAL SPECIFICATIONS
T
J
= T
C
= T
A
= +25
°C
, V
EE
=–5.2 V, V
RB
=–2.0 V, V
RM
=–1.0 V, V
RT
=0.00 V, ƒ
CLK
=1 GHz, Duty Cycle=50%, unless otherwise specified.
PARAMETERS
Dynamic Performance
Spurious Free Dynamic Range
ƒ
IN
= 50 MHz
ƒ
IN
= 250 MHz
Digital Inputs
Input High Voltage
(CLK,
CLK
)
Input Low Voltage
(CLK,
CLK
)
Clock Pulse Width High (t
PWH
)
Clock Pulse Width Low (t
PWL
)
Digital Outputs
Logic 1 Voltage
Logic 0 Voltage
Rise Time
Fall Time
Power Supply Requirements
Voltage V
EE
Current I
EE
Power Dissipation
TEST
CONDITIONS
TEST
LEVEL
SPT7760A
MIN
TYP
MAX
SPT7760B
MIN
TYP
MAX UNITS
I
I
47
39
43
35
dB
dB
I
I
I
I
I
I
V
V
IV
I
I
–1.1
0.5
0.5
–1.1
–0.7
–1.8
0.4
0.4
–0.9
–1.8
450
450
–5.2
1.05
5.5
–1.5
–1.1
0.5
0.5
–1.1
–1.5
–0.7
–1.8
0.4
0.4
–0.9
–1.8
450
450
–5.2
1.05
5.5
–1.5
V
V
ns
ns
V
V
ps
ps
–1.5
20% to 80%
20% to 80%
–4.95
–5.45
1.2
6.25
–4.95
–5.45 V
1.2 A
6.25 W
Typical Thermal Impedance:
θ
JC
= +4
°C/W.
TEST LEVEL CODES
All electrical characteristics are subject to the
following conditions:
All parameters having min/max specifications
are guaranteed. The Test Level column indi-
cates the specific device testing actually per-
formed during production and Quality Assur-
ance inspection. Any blank section in the data
column indicates that the specification is not
tested at the specified condition.
Unless otherwise noted, all test are pulsed
tests; therefore, T
J
= T
C
= T
A
.
LEVEL
I
II
III
IV
V
VI
TEST PROCEDURE
100% production tested at the specified temperature.
100% production tested at T
A
= +25
°C,
and sample tested at the
specified temperatures.
QA sample tested only at the specified temperatures.
Parameter is guaranteed (but not tested) by design and characteri-
zation data.
Parameter is a typical value for information purposes only.
100% production tested at T
A
= +25
°C.
Parameter is guaranteed
over specified temperature range.
3
SPT7760
October 2002
CADEKA [ CADEKA MICROCIRCUITS LLC. ]
