Figure 4 - Single Shot Mode Timing Diagram
t
SC
Start Convert
Latch
MSB
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
A
10
A
11
A
12
A
Clock
High Z State
Serial Data Out
A7
MSB
Start
Conversion
Sample
Analog Input
A6
A5
A4
A3
A2
A1
A0
LSB
Figure 5 - Synchronous Mode Timing Diagram
t
SC
t
SC
Start Convert
Latch
MSB
Latch
MSB
Clock
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
11
A
12
A
High Z State
1
B
2
B
3
B
4
B
5
B
Serial Data Out
A7
MSB
Start
Sample
Analog Input
A
A6
A5
A4
A1
A0
LSB
Sample
Analog Input
B
B7
MSB
Figure 6 - Free Run Mode Timing Diagram
Start Convert
Latch
MSB
Clock
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
1
1
A
1
2
A
1
B
2
B
3
B
4
B
5
B
6
B
7
B
Serial Data Out
A7
MSB
Start
Sample
Analog Input
A
A6
A5
A4
A1
A0
LSB
Sample
Analog Input
B
B7
MSB
B6
B5
Figure 7 - Typical Interface Circuit
Figure 8 - Data Output Timing
t
d
=8 ns
t
d
=8 ns
t
d
=8 ns
t
d
=8 ns
REF IN
.01 µF
VREF+
0V
VIN
VREF+
VDD
+VDD
.01 µF
Analog In
Data Out
+VDD
0V
Clock
4
A
5
A
1
1
A
1
2
A
VREF-
Clock
+VDD
0V
Data Out
A7
MSB
A1
A0
LSB
Ground
SC
+VDD
0V
SPT7730
6
12/19/97
CADEKA [ CADEKA MICROCIRCUITS LLC. ]
