ELECTRICAL SPECIFICATIONS
T
A
= T
MIN
to T
MAX
, V
EE
=–5.2 V, R
Source
=50
Ω,
V
RBF
=–2.00 V, V
R2
=–1.00 V, V
RTF
=0.00 V, ƒ
CLK
=250 MHz, Duty Cycle=50%, unless otherwise specified.
PARAMETERS
Digital Inputs
Digital Input High Voltage
(MINV, LINV)
Digital Input Low Voltage
(MINV, LINV)
Clock Low Width, t
PWL
Clock High Width, t
PWH
Digital Outputs
Digital Output High Voltage
Digital Output Low Voltage
Power Supply Requirements
Supply Current
Power Dissipation
TEST
CONDITIONS
TEST
LEVEL
SPT7725A
MIN
TYP
MAX
SPT7725B
MIN
TYP
MAX
UNITS
VI
VI
VI
VI
50
Ω
to –2 V
50
Ω
to –2 V
+25 °C
+25 °C
VI
VI
VI
VI
–1.1
–2.0
2.2
2.2
–1.1
2.0
2.0
–0.7
–1.5
–1.1
–2.0
2
2
–1.1
1.8
1.8
–0.7
–1.5
Volts
Volts
ns
ns
Volts
Volts
mA
W
–1.5
425
2.2
550
2.9
425
2.2
–1.5
550
2.9
TEST LEVEL CODES
All electrical characteristics are subject to the
following conditions:
All parameters having min/max specifications
are guaranteed. The Test Level column indi-
cates the specific device testing actually per-
formed during production and Quality Assur-
ance inspection. Any blank section in the data
column indicates that the specification is not
tested at the specified condition.
Unless otherwise noted, all test are pulsed
tests; therefore, T
J
= T
C
= T
A
.
LEVEL
I
II
III
IV
V
VI
TEST PROCEDURE
100% production tested at the specified temperature.
100% production tested at T
A
= +25 °C, and sample tested at the
specified temperatures.
QA sample tested only at the specified temperatures.
Parameter is guaranteed (but not tested) by design and characteri-
zation data.
Parameter is a typical value for information purposes only.
100% production tested at T
A
= +25 °C. Parameter is guaranteed
over specified temperature range.
SPT7725
3
8/17/01
CADEKA [ CADEKA MICROCIRCUITS LLC. ]
