42
41
40
N/C
VRTF
N/C
PIN ASSIGNMENTS
1
2
3
PIN FUNCTIONS
VEE
N/C
LINV
9
8
7
6
5
4
3
2
1
Name
LINV
VEE
Function
A
B
C
D
E
F
VEE 39
4
5
VEE
D8
D5
D4
D3
D2
D1
D0
DGND
D0 through D6 Output Inversion Control Pin
Negative Analog Supply Nominally –5.2 V
Digital Ground
D6
D7
VEE
N/C
38
37
AGND
DGND
AGND
DREAD AGND
6
7
8
N/C 36
V
DGND
N/C
V
EE
D0 (LSB)
DGND
D0
EE
AGND
35
34
Bottom
View
D1
D2
D3
D4
MINV
CLK
LINV DRINV
Digital Data Output (LSB)
Digital Data Output
CLK
VIN
AGND
VR2
9
33
32
D1–D6
D7
V
V
AGND
AGND
10
DIP
EE
EE
11
Digital Data Output (MSB)
D7 Output Inversion Control Pin
Inverse ECL Clock Input Pin
ECL Clock Input Pin
AGND AGND
V
RTS
PGA
AGND 31
12
13
D5
D6
G
H
J
MINV
CLK
V
V
N/C
V
VIN
RBS
EE
RTF
30
29
28
AGND
14
15
16
17
D7 (MSB)
DGND
AGND
VEE
V
V
V
V
EE
RBF
R1
R3
N/C
CLK
AGND
VIN
N/C
AGND
V
AGND
V
AGND
V
IN
AGND
N/C
IN
R2
N/C 27
VEE
VEE
26
25
Analog Ground
18
19
MINV
N/C
Analog Input; Can be Connected to the
Input Signal or Used as a Sense
N/C 24
VRBF 23
N/C 22
20
21
CLK
CLK
VR2
Reference Voltage Tap 2 (–1.0 V typ)
Reference Voltage Top
VRTF
VRBF
Reference Voltage Bottom
DGND
AGND
VEE
1
2
33
AGND
VEE
32
LINV
N/C
3
4
5
6
31
30
29
The following pins are on PGA and cerquad packages only.
MINV
CLK
DRINV
N/C
DRINV
Data Ready Inverse
Data Ready Output
Cerquad
CLK
28
27
26
25
VEE
VEE
7
8
9
DREAD
AGND
AGND
VRBS
VRBF
AGND
AGND
VRTS
VRTF
Overrange Overrange Output D8
10
11
24
23
VR1
Reference Voltage Tap 1 (–1.5 V typ)
VR3
Reference Voltage Tap 3 (–0.5 V typ)
Reference Voltage Top, Sense
VRTS
VRBS
Reference Voltage Bottom, Sense
ORDERING INFORMATION
PART NUMBER
SPT7725AIJ
SPT7725BIJ
SPT7725AIG
SPT7725BIG
SPT7725AIQ
SPT7725BIQ
SPT7725BCU
LINEARITY
TEMPERATURE RANGE
–25 to +85 °C
–25 to +85 °C
–25 to +85 °C
–25 to +85 °C
–25 to +85 °C
–25 to +85 °C
+25 °C
PACKAGE TYPE
42L Ceramic S/B
42L Ceramic S/B
46L PGA
0.75 LSB
0.95 LSB
0.75 LSB
0.95 LSB
0.75 LSB
0.95 LSB
0.95 LSB
46L PGA
44L Cerquad
44L Cerquad
Die*
*Please see the die specification for guaranteed electrical performance.
SPT7725
12
8/17/01