Data Sheet
Driving Capacitive Loads
Increased phase delay at the output due to capacitive load-
ing can cause ringing, peaking in the frequency response,
and possible unstable behavior. Use a series resistance,
R
S
, between the amplifier and the load to help improve
stability and settling performance. Refer to Figure 6.
ringing. Refer to the
layout considerations
section for
additional information regarding high speed layout tech-
niques.
Overdrive Recovery
An overdrive condition is defined as the point when either
one of the inputs or the output exceed their specified volt-
age range. Overdrive recovery is the time needed for the
amplifier to return to its normal or linear operating point.
The recovery time varies, based on whether the input or
output is overdriven and by how much the range is ex-
ceeded. The CLCx601 Family will typically recover in less
than 20ns from an overdrive condition. Figure 7 shows the
CLC2601 in an overdriven condition.
1.00
0.75
0.50
Input
Output
4
3
2
Comlinear
™
CLC2601, CLC3601, CLC4601
Dual, Triple, and Quad 550MHz Amplifiers
Input
+
-
R
f
R
g
R
s
C
L
R
L
Output
Figure 6. Addition of R
S
for Driving
Capacitive Loads
Table 2 provides the recommended R
S
for various capaci-
tive loads. The recommended R
S
values result in <=0.5dB
peaking in the frequency response. The Frequency Re-
sponse vs. C
L
plot, on page 5, illustrates the response of
the CLCx601 Family.
C
L
(pF)
10
50
100
R
S
(Ω)
40
20
15
-3dB BW (MHz)
350
200
140
V
IN
= 1.5V
pp
G=5
Output Voltage (V)
Input Voltage (V)
0.25
0.00
-0.25
-0.50
-0.75
-1.00
0
20
40
60
1
0
-1
-2
-3
-4
80
100
120
140
160
180
200
Time (ns)
Figure 7. Overdrive Recovery
Table 1: Recommended R
S
vs. C
L
For a given load capacitance, adjust R
S
to optimize the
tradeoff between settling time and bandwidth. In general,
reducing R
S
will increase bandwidth at the expense of ad-
ditional overshoot and ringing.
Parasitic Capacitance on the Inverting Input
Physical connections between components create unin-
tentional or parasitic resistive, capacitive, and inductive
elements.
Parasitic capacitance at the inverting input can be espe-
cially troublesome with high frequency amplifiers. A para-
sitic capacitance on this node will be in parallel with the
gain setting resistor R
g
. At high frequencies, its imped-
ance can begin to raise the system gain by making R
g
appear smaller.
In general, avoid adding any additional parasitic capaci-
tance at this node. In addition, stray capacitance across
the R
f
resistor can induce peaking and high frequency
©2004-2008 CADEKA Microcircuits LLC
Power Dissipation
Power dissipation should not be a factor when operating
under the stated 1000 ohm load condition. However, ap-
plications with low impedance, DC coupled loads should
be analyzed to ensure that maximum allowed junction
temperature is not exceeded. Guidelines listed below can
be used to verify that the particular application will not
cause the device to operate beyond it’s intended operat-
ing range.
Maximum power levels are set by the absolute maximum
junction rating of 150°C. To calculate the junction tem-
perature, the package thermal resistance value Theta
JA
(Ө
JA
) is used along with the total die power dissipation.
Rev 1C
T
Junction
= T
Ambient
+ (Ө
JA
× P
D
)
Where T
Ambient
is the temperature of the working environment.
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