欢迎访问ic37.com |
会员登录 免费注册
发布采购

CLC2550ISO8X 参数 Datasheet PDF下载

CLC2550ISO8X图片预览
型号: CLC2550ISO8X
PDF下载: 下载PDF文件 查看货源
内容描述: 低功耗,低失调, 2V至36V比较器 [Low Power, Low Offset, 2V to 36V Comparators]
分类和应用: 比较器
文件页数/大小: 11 页 / 1534 K
品牌: CADEKA [ CADEKA MICROCIRCUITS LLC. ]
 浏览型号CLC2550ISO8X的Datasheet PDF文件第1页浏览型号CLC2550ISO8X的Datasheet PDF文件第2页浏览型号CLC2550ISO8X的Datasheet PDF文件第4页浏览型号CLC2550ISO8X的Datasheet PDF文件第5页浏览型号CLC2550ISO8X的Datasheet PDF文件第6页浏览型号CLC2550ISO8X的Datasheet PDF文件第7页浏览型号CLC2550ISO8X的Datasheet PDF文件第8页浏览型号CLC2550ISO8X的Datasheet PDF文件第9页  
Data Sheet
Absolute Maximum Ratings
The safety of the device is not guaranteed when it is operated above the “Absolute Maximum Ratings”. The device
should not be operated at these “absolute” limits. Adhere to the “Recommended Operating Conditions” for proper de-
vice function. The information contained in the Electrical Characteristics tables and Typical Performance plots reflect the
operating conditions noted on the tables and plots.
C
omlinear
CLC2550, CLC4550
Low Power, Low Offset, 2V to 36V Comparators
Parameter
Supply Voltage
Differential Input Voltage
Input Voltage
Input Current (V
IN
< -0.3V)
(1)
Output Short Circuit Current to Ground
Power Dissipation (T
A
= 25°C) - SOIC-8
Power Dissipation (T
A
= 25°C) - SOIC-14
Min
0
-0.3
Continuous
Max
40
40
40
50
660
890
Unit
V
V
V
mA
mW
mW
Notes:
1. This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of the input PNP transistors be-
coming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is also lateral NPN parasitic transistor action on the IC chip. This
transistor action can cause the output voltages of the comparators to go to the V+ voltage level (or to ground for a large overdrive) for the time duration that an input is
driven negative. This is not destructive and normal output states will re-establish when the input voltage, which was negative, again returns to a value greater than -0.3
V
DC
(at 25°C).
Reliability Information
Parameter
Junction Temperature
Storage Temperature Range
Lead Temperature (Soldering, 10s)
Package Thermal Resistance
SOIC-8
SOIC-14
Notes:
Package thermal resistance (q
JA
), JDEC standard, multi-layer test boards, still air.
Min
-65
Typ
Max
150
150
260
Unit
°C
°C
°C
°C/W
°C/W
100
88
Recommended Operating Conditions
Parameter
Operating Temperature Range
Supply Voltage Range
Min
-40
2 (±1)
Typ
Max
+85
36 (±18)
Unit
°C
V
Rev 1A
©2007-2009 CADEKA Microcircuits LLC
www.cadeka.com
3