Data Sheet
Driving Capacitive Loads
ringing. Refer to the lꢂyꢀꢊꢅ cꢀꢆꢈꢇdꢄꢃꢂꢅꢇꢀꢆꢈ section for
additional information regarding high speed layout tech-
niques.
Increased phase delay at the output due to capacitive load-
ing can cause ringing, peaking in the frequency response,
and possible unstable behavior. Use a series resistance,
Overdrive Recovery
R , between the amplifier and the load to help improve
stability and settling performance. Refer to Figure 6.
S
An overdrive condition is defined as the point when either
one of the inputs or the output exceed their specified volt-
age range. Overdrive recovery is the time needed for the
amplifier to return to its normal or linear operating point.
The recovery time varies, based on whether the input or
output is overdriven and by how much the range is ex-
ceeded. The CLC1606 Family will typically recover in less
than 10ns from an overdrive condition. Figure 7 shows the
CLC1606 in an overdriven condition.
Input
+
-
Rs
Output
CL
RL
Rf
Rg
Figure 6. Addition of R for Driving
S
1.5
1
6
Capacitive Loads
VIN = 2Vpp
G = 5
4
Table 2 provides the recommended R for various capaci-
S
Input
tive loads. The recommended R values result in <=0.5dB
S
Output
0.5
0
2
peaking in the frequency response. The Frequency Re-
sponse vs. C plot, on page 5, illustrates the response of
L
0
the CLC1606 Family.
-0.5
-1
-2
-4
-6
C (pF)
L
R (Ω)
-3dB BW (MHz)
S
20
20
10
375
180
58
-1.5
100
0
20
40
60
80 100 120 140 160 180 200
1000
3.3
T im e ( n s )
Figure 7. Overdrive Recovery
Power Dissipation
Table 1: Recommended R vs. C
S
L
For a given load capacitance, adjust R to optimize the
tradeoff between settling time and bandwidth. In general,
S
Power dissipation should not be a factor when operating
under the stated 1000 ohm load condition. However, ap-
plications with low impedance, DC coupled loads should
be analyzed to ensure that maximum allowed junction
temperature is not exceeded. Guidelines listed below can
be used to verify that the particular application will not
cause the device to operate beyond it’s intended operat-
ing range.
reducing R will increase bandwidth at the expense of ad-
S
ditional overshoot and ringing.
Parasitic Capacitance on the Inverting Input
Physical connections between components create unin-
tentional or parasitic resistive, capacitive, and inductive
elements.
Maximum power levels are set by the absolute maximum
junction rating of 150°C. To calculate the junction tem-
Parasitic capacitance at the inverting input can be espe-
cially troublesome with high frequency amplifiers. A para-
sitic capacitance on this node will be in parallel with the
perature, the package thermal resistance value Theta
JA
(Ө ) is used along with the total die power dissipation.
JA
gain setting resistor R . At high frequencies, its imped-
g
ance can begin to raise the system gain by making R
g
appear smaller.
T
= T + (Ө × P )
Ambient JA D
Junction
In general, avoid adding any additional parasitic capaci-
tance at this node. In addition, stray capacitance across
Where T
is the temperature of the working environment.
the R resistor can induce peaking and high frequency
Ambient
f
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www.cadeka.com
14
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