Data Sheet
Follow these guidelines for improved performance:
Application Information
To maintain gain accuracy, use 0.1% to 1% resistors
Basic Operation
▪
To minimize gain error, avoid high parasitic resistance in
The CLC1201 is a monolithic instrumentation amplifier
based on the classic three op amp solution, refer to
the Functional Block Diagram on page 1. The CLC1201
produces a single-ended output reffered to the REF pin
potential.
▪
series with R
G
To minimize gain drift, use low TC resistors (<10ppm/°C)
▪
Common Mode Rejection
The internal resistors are trimmed which allows the gain to
be accurately adjusted with one external resistor R .
G
The CLC1201 offers high CMRR. To acheive optimal CMRR
performance:
49.4k
49.4k
G =
+ 1; R =
G
R
G
G - 1
Connect the reference terminal (pin 5) to a low
▪
impedance source
R
also determines the transconductance of the
Minimize capacitive and resistive differences between
the inputs
G
▪
preamp stage. As R is reduced for larger gains, the
G
transconductance increases to that of the input transistors.
Producing the following advantages:
In many applications, shielded cables are used to
minimize noise. Properly drive the shield for best CMRR
performance over frequency. Figures 1 and 2 show active
data guards that are configured to improve AC common-
mode rejections. the capacitances of input cable shields
are “bootstrapped” to minimize the capacitance mismatch
between the inputs.
Open-loop gain increases as the gain is increased,
reducing gain releated errors
▪
Gain-bandwidth increases as the gain is increased,
optimizing frequency response
▪
Reduced input voltage noise which is determined by the
collector current and base resistance of the input devices
▪
+V
S
+ Input
_
R
R
/ 2
/ 2
G
_
100
CLC1200
Output
CLCxxx
Gain Selection
G
+
+
REF
The impeadance between pins 1 and 8, R , sets the gain
- Input
G
-V
S
of the CLC1201. Table 1 shows the required standard
table values of R for various calculated gains. For G =
G
1, R = ∞.
G
Figure 1: Common-mode Shield Driver
+V
S
+ Input
Caclulated
Gain
Calculated
Gain
_
+
+
-
1% R (Ω)
0.1% R (Ω)
G
G
100
100
R
CLC1200
Output
G
49.9k
12.4k
5.49k
2.61k
1.00k
499
1.990
4.984
9.998
19.93
50.40
100.0
199.4
495.0
991.0
49.3k
12.4k
5.49k
2.61k
1.01k
499
2.002
4.984
9.998
19.93
49.91
100.0
199.4
501.0
1,003.0
-V
S
-
+
REF
- Input
-V
S
Figure 2: Differential Shield Driver
249
249
100
98.8
49.9
49.3
Table 1: Recommended R Values
G
©2011 CADEKA Microcircuits LLC
www.cadeka.com
11
CADEKA [ CADEKA MICROCIRCUITS LLC. ]
