Data Sheet
Application Information
General Description
The CLC1008 family are a single supply, general purpose,
voltage-feedback amplifiers fabricated on a complementary
bipolar process. The CLC1008 offers 75MHz unity gain
bandwidth, 50V/μs slew rate, and only 505μA supply current.
It features a rail-to-rail output stage and is unity gain stable.
Figures 1, 2, and 3 illustrate typical circuit configurations for
non-inverting, inverting, and unity gain topologies for dual
supply applications. They show the recommended bypass
capacitor values and overall closed loop gain equations.
Figure 4 shows the typical non-inverting gain circuit for
single supply applicaitons.
The common mode input range extends to 300mV below
ground in single supply operation. Exceeding these values
will not cause phase reversal. However, if the input voltage
exceeds the rails by more than 0.5V, the input ESD devices
will begin to conduct.
The design uses a Darlington output stage. The output
stage is short circuit protected and offers “soft” saturation
protection that improves recovery time.
+V
s
6.8μF
+V
s
6.8uF
Input
+
-
0.1uF
C
omlinear
CLC1008, CLC1018, CLC2008
0.5mA, Low Cost, 75MHz Rail-to-Rail Amplifiers
Output
R
L
0.1uF
6.8uF
-V
s
G=1
Figure 3. Unity Gain Circuit
+V
s
6.8μF
+
In
+
-
R
g
0.1μF
Out
R
f
Figure 4. Single Supply Non-Inverting Gain Circuit
Input
+
-
0.1μF
R
g
-V
s
6.8μF
R
f
G = 1 + (R
f
/R
g
)
0.1μF
Output
R
L
For optimum response at a gain of +2, a feedback resistor
of 1kΩ is recommended. Figure 5 illustrates the CLC1008
frequency response with both 1kΩ and 2kΩ feedback
resistors.
G=2
R
L
= 1kΩ
R
f
= 2kΩ
Figure 1. Typical Non-Inverting Gain Circuit
+V
s
Magnitude (1dB/div)
6.8μF
R
f
= 1kΩ
R
1
Input
R
g
+
-
0.1μF
Output
0.1μF
6.8μF
-V
s
R
L
R
f
Rev 2A
0.1
G = - (R
f
/R
g
)
For optimum input offset
voltage set R
1
= R
f
|| R
g
1
10
100
Frequency (MHz)
Figure 2. Typical Inverting Gain Circuit
©2009-2011 CADEKA Microcircuits LLC
Figure 5. Frequency Response vs. R
f
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